Hardware Design Architect

Maxonic Inc.; Milpitas (CA); On-site; USD 140,000 - 210,000; Full time

Job summary

Maxonic Inc. seeks an experienced Hardware Design Architect to lead architecture, design and development of high‑performance tester platforms in Milpitas, CA.

You will drive system-level hardware architectures, reviews, and technical risk assessments while coordinating with firmware, FPGA, mechanical, and manufacturing teams. You will oversee hardware development from concept through validation and manufacturing release, with emphasis on high‑speed interfaces, SI/PI, power delivery, and thermal

Qualifications

• 15+ years hardware design and development experience.
• 5+ years leading hardware architecture and development of complex systems.
• Expertise in high-speed digital design and architecture.
• Experience with PCIe Gen4/Gen5/Gen6, USB, I2C, SMBus, UART, DDR memory.
• Strong SI/PI, EMI/EMC, and thermal management knowledge.
• PCB design reviews with Cadence Allegro or equivalent tools.
• FPGA/CPLD and embedded system integration experience.
• Knowledge of control interfaces: SPI, I2C, UART, JTAG.

Responsibilities

• Define system-level hardware architectures and requirements for tester platforms.
• Lead architecture reviews, design reviews, risk assessments, and trade studies.
• Develop roadmaps and evaluate emerging technologies and standards.
• Lead hardware development from concept to manufacturing release.
• Provide architectural oversight for high-speed, mixed-signal, power, and control systems.
• Support hardware bring-up, debugging, validation, and failure analysis.

Skills

High-speed digital design

Signal Integrity

Power Integrity

PCB Design

FPGA/CPLD

System integration

PCIe Gen4/Gen5/Gen6

Thermal management

CADENCE Allegro

SPI/I2C/UART/JTAG

Tools

Cadence Allegro

Job description

Maxonic maintains a close and long-term relationship with our direct client. In support of their needs, we are looking for a Hardware Design Architect.

Job Description

• Job Title: Hardware Design Architect
• Job Location: Milpitas, CA
• Work Schedule: onsite

We are seeking an experienced Hardware Design Architect to lead the architecture, design, and development of next‑generation high‑performance test and validation platforms. The ideal candidate possesses deep expertise in high‑speed digital design, signal integrity, power delivery, board‑level architecture, and system integration. This individual will work closely with Firmware, FPGA, Mechanical, Manufacturing, Validation, and Program Management teams to deliver scalable, reliable, and cost‑effective hardware solutions.

Responsibilities

Architecture & Technical Leadership

• Serve as the technical authority for hardware architecture decisions and executive‑level design reviews.
• Define system‑level hardware architectures and technical requirements for next‑generation tester platforms and supporting infrastructure.
• Drive key technical decisions balancing performance, cost, manufacturability, reliability, and schedule objectives.
• Lead architecture reviews, design reviews, technical risk assessments, and design tradeoff analyses.
• Develop technology roadmaps and evaluate emerging technologies, components, and industry standards.

Hardware Development

• Lead hardware development from concept, feasibility, architecture, design, validation, qualification, and manufacturing release.
• Review and approve hardware architectures, schematics, PCB layouts, simulation results, validation plans, and qualification strategies.
• Drive first‑pass design success through robust engineering methodologies and design practices.
• Provide architectural oversight for high‑speed digital, mixed‑signal, power, and control systems.

Technical Expertise

• Lead technical resolution of complex hardware issues involving: High‑speed interfaces, Signal Integrity (SI), Power Integrity (PI), Power delivery networks, Thermal challenges, System‑level integration.
• Drive root‑cause investigations and corrective actions for critical design and manufacturing issues.
• Participate in hardware bring‑up, debugging, validation, and failure analysis activities.

Qualifications

• 15+ years of hardware design and development experience.
• 5+ years leading hardware architecture and technical development of complex electronic systems.
• Expertise in high‑speed digital design and architecture.
• Experience with PCIe Gen4/Gen5/Gen6, USB, I2C, SMBus, UART, DDR memory systems, High‑speed serial interfaces
• Strong knowledge of: Signal Integrity (SI), Power Integrity (PI), Power distribution network design, EMI/EMC considerations, Thermal management
• Expertise in PCB design and review using Cadence Allegro or equivalent design tools.
• Experience with FPGA, CPLD, and embedded system integration.
• Strong knowledge of control interfaces including SPI, I2C, UART, JTAG, and related protocols.
• Hands‑on experience with hardware bring‑up, validation, debugging, and manufacturing support.