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Silvus is looking for a Principal FPGA / RTL Design Engineer - Signal Processing in Irvine, California. The role involves collaboration with the FPGA Engineering team to participate in the entire R&D process from concept to deployment. The successful candidate will have over 10 years of experience in RTL design and FPGA implementations.
This position offers a salary range of $165,000 to $250,000 based on experience and qualifications.
Silvus is seeking a Principal FPGA / RTL Design Engineer - Signal Processing who will report to the Senior Engineering Director in Irvine and work closely with the FPGA Engineering team. The successful individual will participate in all aspects of the research and development process from concept to field deployment. This role is 100% onsite, Monday through Friday, at Silvus Technologies’ Engineering and R&D Office in Irvine, CA, near the vibrant Irvine Spectrum.
Pay range: $165,000 – $250,000 USD. Actual offer will be based on candidate experience and qualifications.
Motorola Solutions is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion or belief, sex, sexual orientation, gender identity, national origin, disability, veteran status or any other legally protected characteristic.
NOTE – As a U.S. Federal Contractor, Silvus Technologies requires that ALL candidates being considered for employment for any position (regardless of level) MUST be a U.S. Person (permanent resident or citizen). Stricter U.S. Citizen ONLY requirements (needed for some Engineering or R&D roles) will be included in the Required Qualifications section of the posted position. This does not apply to international positions; only job postings for positions located in the U.S.
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