Senior FPGA / RTL Design Engineer - Signal Processing

Silvus Technologies; Los Angeles (CA); On-site; USD 125,000 - 195,000; Full time

Job summary

A leading communications technology provider is looking for a Senior FPGA / RTL Design Engineer specializing in signal processing. This role involves implementing complex signal processing algorithms for MIMO wireless products and working closely with the engineering team. Ideal candidates should have a Bachelor’s in Electrical Engineering and at least 6 years of relevant FPGA experience. This position is hybrid, with a minimum of 3 days needed onsite per week, located in vibrant West Los Angeles.

Qualifications

• Minimum 6 years of FPGA design experience or equivalent education.
• Demonstrated experience with fixed-point binary arithmetic.
• Experience with high-utilization FPGA designs.

Responsibilities

• Design fixed-point signal processing blocks with systems engineers.
• Perform RTL coding, simulation, and test bench development.
• Conduct FPGA synthesis and timing closure.

Skills

Fixed-point binary arithmetic

Digital signal processing designs

Xilinx FPGAs and Vivado IDE

High-utilization FPGA designs

Education

Bachelor of Science degree in Electrical Engineering

Tools

MATLAB

Job description

Senior FPGA / RTL Design Engineer - Signal Processing

Silvus Technologies, a leading provider of advanced MANET and MIMO communications systems, is reshaping mesh network technology for mission‑critical applications – on the ground, in the air, and at sea. Its battle‑proven StreamCaster family of MANET radios and proprietary MN‑MIMO waveform provides the vital communications link for defense, law enforcement, and public safety agencies worldwide, and in the toughest operational environments.

With deep roots in DARPA research, Silvus Technologies develops world‑class advanced communications technologies that are reshaping the tactical communications landscape. From pure line‑of‑sight to extreme non‑line‑of‑sight, Silvus radios form a self‑healing, self‑forming mesh network, enabling secure and reliable connectivity, including video and high‑bandwidth data.

Silvus Technologies is a wholly owned subsidiary of Motorola Solutions, Inc.

Would you like to join an incredibly talented group of people, doing very challenging work, with the prime directive of "Keeping Our Heroes Connected"?

THE OPPORTUNITY

Silvus is seeking a Senior FPGA Design Engineer – Signal Processing reporting to the Director of FPGA Engineering on the FPGA Engineering team. The successful individual will participate in all aspects of the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal processing algorithms for Silvus' MIMO wireless networking products and for supporting and developing FPGA‑based designs for our advanced wireless systems R&D. These are exciting projects that address challenging real‑world communication needs.

This position is based at Silvus Technologies’ headquarters in the heart of vibrant West Los Angeles, CA, and is on a hybrid schedule. A minimum of 3 days onsite per week is expected (Mondays, Wednesdays, and Thursdays).

ROLE AND RESPONSIBILITIES

• Fixed point design of signal processing blocks while working with systems engineers.
• RTL coding, simulation, and test bench development.
• FPGA synthesis and timing closure.
• Hardware verification and troubleshooting; familiarity with logic analyzers.
• Provide support to the RF and Software Engineering teams.
• Perform other related duties as required.

REQUIRED QUALIFICATIONS

• Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields.
• Minimum 6 years of demonstrated experience in FPGA design; or 4 years of FPGA design experience with a Master of Science degree; or 2 years of FPGA design experience with a PhD degree.
• Demonstrated experience with fixed‑point binary arithmetic and digital signal processing designs.
• Proven expertise working with multiple clock‑domain, high‑utilization FPGA designs.
• Experience with Xilinx FPGAs, SoCs, and the Vivado IDE.
• Must be U.S. Person (U.S. Citizen or Permanent Resident) due to clients under U.S. federal contracts.
• All employment is contingent upon the successful clearance of a background check and drug test.

PREFERRED KNOWLEDGE, SKILLS, AND ABILITIES

• Master of Science degree in Electrical Engineering (MSEE).
• Experience using MATLAB.
• Experience with communication systems on FPGA or ASIC designs.

WORKING CONDITIONS AND PHYSICAL REQUIREMENTS

• Occasional exposure to heat, cold, and allergens while performing tests or demonstrations in the field.
• While performing the duties of this job, the employee is required to do the following:
  • Lift equipment up to 20 lbs. for the set‑up of demonstrations and testing.
  • Perform bending and reaching movements to place items on lower and higher shelves.
  • Kneeling or squatting to access lower shelves.
  • Walking/Moving in the labs.

COMPENSATION

The pay range is NOT a guarantee. It is based on market research and peer data, and will vary depending on the candidate’s experience and qualifications.

CA Pay Range

$125,000 - $195,000 USD

Silvus is proud to be an equal opportunity employer, and we value diversity. We do not discriminate on the basis of race, color, age, religion or belief, ancestry, national origin, sex (including pregnancy), sexual orientation, gender identity and/or expression, marital status, civil union or domestic partnership status, physical or mental disability, protected veteran status, genetic information, political affiliation, or any other factor protected by applicable federal, state, or local laws.

We will ensure that individuals with disabilities are provided with reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive benefits and privileges of employment. Please contact us to request accommodation.