Principal Electrical Engineer - Asic/Fpga Verification (Onsite)

Prattwhitney; Cedar Rapids (IA); On-site; USD 100,000 - 130,000; Full time

Benefits offered by this job

Medical, dental, and vision insurance

401(k) with employer matching

Tuition reimbursement

Life insurance and disability coverage

Employee Assistance Plan

Job summary

Prattwhitney is seeking a Principal Electrical or Computer Engineer in Cedar Rapids, Iowa, to lead the design, implementation, and verification of advanced testbenches for high-performance digital ASICs and FPGAs. Candidates should have at least 8 years of relevant experience and strong knowledge of RTL development using VHDL or SystemVerilog.

This role offers a competitive benefits package that includes medical insurance, 401(k) matching, tuition reimbursement, and various wellness programs.

Qualifications

• 8+ years relevant experience or 5+ with an advanced degree.
• Active U.S. government security clearance required.
• Demonstrated experience with RTL designs in FPGA/ASIC environment.

Responsibilities

• Lead design, implementation, and verification of advanced testbenches.
• Create written test plans and cases for verification.
• Provide technical leadership for project verification teams.

Skills

RTL design development

VHDL

SystemVerilog

Functional verification

Communication skills

Education

Degree in STEM

Advanced degree in related field

Tools

Git

QuestaSim

Quartus

Job description

We are seeking an experienced and highly motivated Principal Electrical or Computer Engineer to lead the design, implementation, and verification of advanced testbenches for a portfolio of high‑performance digital ASICs and FPGAs. In this role, you will drive the development of cutting‑edge signal processing and information assurance technologies supporting critical Mission Systems programs as part of the Microelectronics Technology team.

Responsibilities

• Design the verification environment architecture and design using SystemVerilog with OVM/UVM
• Create written test plans, test cases, code coverage tracking, and functional coverage tracking
• Develop testbenches for the verification of RTL blocks using VHDL or SystemVerilog
• Recommend new tools and practices for continuous improvement in the group’s ASIC/FPGA verification flow
• Contribute to engineering estimates for new program pursuits
• Provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status

Qualifications

• Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 8 years of relevant experience, or an advanced degree in a related field and a minimum of 5 years of experience
• Active and transferable U.S. government‑issued security clearance is required prior to start date
• U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance
• Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment
• Proven ability to design, implement, and execute verification testbenches for RTL blocks using VHDL and/or SystemVerilog
• Working knowledge of chip‑level verification methodologies, including constrained‑random testing, functional coverage, and assertion‑based verification using SystemVerilog
• Experience using revision control systems such as Git or Subversion to manage source code, collaborate across engineering teams, and maintain configuration integrity
• Experience with ASIC/FPGA lab validation and debug using standard lab equipment, familiarity with DFT, manufacturability, and production test concepts
• Proficiency with Unix/Linux environments, scripting or software development (C, C++, Python, Perl, or shell), and industry‑standard ASIC/FPGA simulation and synthesis tools such as QuestaSim, Synplify, Quartus, or Vivado
• Strong written and verbal communication skills, with the ability to work independently and collaboratively in fast‑paced, multidisciplinary engineering environments

Benefits

• Medical, dental, and vision insurance
• Three weeks of vacation for newly hired employees
• Generous 401(k) plan that includes employer matching funds and separate employer retirement contribution, including a Lifetime Income Strategy option
• Tuition reimbursement program
• Student loan repayment program
• Life insurance and disability coverage
• Optional pet, home, and auto insurance, additional life and accident insurance, critical illness insurance, group legal, ID theft protection
• Birth, adoption, parental leave benefits, fertility and family planning (Ovia Health)
• Adoption assistance
• Autism Benefit
• Employee Assistance Plan, including up to 10 free counseling sessions
• Healthy You Incentives, wellness rewards program
• Doctor on Demand, virtual doctor visits
• Bright Horizons, child and elder care services
• Teladoc Medical Experts, second opinion program

Equal Opportunity Employer

RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, veteran status, or any other applicable state or federal protected class. RTX provides affirmative action in employment for qualified individuals with a disability and protected veterans in compliance with Section 503 of the Rehabilitation Act and the Vietnam Era Veterans’ Readjustment Assistance Act.