Power Integrity Engineer

Qualcomm; Santa Clara (CA); On-site; USD 125,000 - 150,000; Full time

Job summary

An innovative firm is seeking a power integrity engineer to join its dynamic team. This role involves conducting power integrity analysis and optimization for cutting-edge application processors and graphic processors. The successful candidate will engage in SOC floor planning, package optimization, and PCB co-design, ensuring high-performance designs while minimizing voltage noise. With a commitment to inclusivity and accessibility, this opportunity offers a chance to contribute to groundbreaking technologies in mobile and wireless platforms. Join a team that values creativity and collaboration, and make a significant impact in the semiconductor industry.

Qualifications

• 2-5 years of experience in semiconductor industry and power integrity analysis.
• Understanding of PCB design and power integrity concepts.

Responsibilities

• Conduct power integrity analysis and optimization for next-gen processors.
• Collaborate with custom circuit designers on design trade-offs.

Skills

Power Integrity Analysis

PCB Design Techniques

SOC Floor Planning

Decoupling Schemes

Design Trade-off Analysis

Education

Bachelor's degree in Science or Engineering

M.S.C in Electrical Engineering

Tools

Agilent ADS

Hspice

Cadence/Mentor Extraction Tools

Job description

Company:

Qualcomm Semiconductor Limited

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Qualcomm Power Integrity group is looking for a power integrity engineer to work on power integrity analysis and optimization of next generation of application processors, graphic processors and modems for mobile, auto and wireless LAN platforms. Job responsibilities include SOC floor planning, system optimization, package/PCB optimization and characterization as well silicon package PCB co-design.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field.
• 2-5 years of experience in semiconductor industry, Packaging, PCB & Power integrity analysis and measurements
• M.S.C in Electrical Engineering
• Understanding of package and PCB design techniques including optimal layer stack-up and PWR/GND plane/island assignments to minimize voltage noise.
• Understanding of power integrity concepts, methodologies, on chip and off chip decoupling schemes.
• Experience in power integrity analysis on main digital domain including application processors, graphic processors and modems.
• Experience in presenting design trade-off analyses and implementation recommendations with custom circuit designers.
• Expertise in using Agilent ADS, Hspice and Cadence/Mentor extraction tools.
• Understanding of measurement techniques including VNA and time domain measurements.
• Knowledge of SOC floor planning and required tradeoffs.

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.

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