Power Delivery & PI Architect — Data Center Systems

Qualcomm

Santa Clara (CA)

On-site

USD 180,500 - 270,700

Full time

14 days+

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Job summary

Qualcomm Technologies, Inc. is seeking an experienced Power Delivery and Power Integrity Architect to define and verify end‑to‑end PDN solutions for data-center platforms.

You will collaborate with SoC, firmware, memory vendors, packaging, and platform teams to drive VR implementations and PDN modeling from die to system. The role requires strong PI fundamentals, multi‑phase VR design, and hands‑on experience with PI tools.

Qualifications

  • Master’s degree in Electrical Engineering or related field; experience in Power Delivery preferred.
  • 8+ years of experience in Power Delivery, board‑level VR design, PI analysis, simulation, and PDN measurements.
  • Strong understanding of PI fundamentals, power supply architectures, voltage regulator technologies, chip supply design, and PDNs.
  • Experience developing PI methodologies and PDN modeling from die to system, with model correlation and lab validation.
  • Experience with server, HPC, or data center platform power delivery preferred.
  • Experience with multi‑phase VR design/selection.
  • Proficiency in PI simulation tools (e.g., Simplis/Simetrix, ADS, ANSYS SIwave, HFSS, and Cadence Sigrity PowerDC/PowerSI).
  • Hands‑on experience creating complex PI models and simulations.
  • Proficiency with Unix/Linux environments and EDA tools using scripting.

Responsibilities

  • Collaborate with SoC, firmware/software, memory vendors, component suppliers, packaging, platform engineering, and system design teams to define and implement power architectures that meet internal and customer requirements.
  • Lead voltage regulator (VR) design specification, selection, and co‑development with VR suppliers.
  • Develop E2E VR + PDN simulation flows to reduce time to market.
  • Perform PDN modeling, simulation, and characterization for SoC, package, PCB, VRs, and LDOs.
  • Provide PI‑driven feedback to SoC design teams to influence decap, package, and power rail architecture.
  • Create power maps, power tree and power‑flow diagrams, and power budgets from die to system level.
  • Develop and provide implementation and system efficiency guidelines.
  • Conduct IR drop, AC, and transient simulations and provide model‑to‑hardware correlations.
  • Define module interfaces and formats for simulation and customer guidelines.
  • Lead PI model creation, end‑to‑end PI simulations (thermal‑aware), and final design development considering heat sink and temperature effects.
  • Leverage ML/AI‑assisted simulation techniques to streamline and automate design and analysis workflows from die to regulators.
  • Prepare and present technical documentation and reports to stakeholders, including engineering teams, senior management, customers, and suppliers.
  • Engage with customers and OEM partners to provide power delivery architecture guidance, PDN design guidelines, and bring‑up support.
  • Troubleshoot system performance and identify areas for improvement.

Skills

Power Delivery
Power Integrity
VR design
PI simulation tools
Unix/Linux scripting
EDA tools scripting

Education

Master’s degree in Electrical Engineering or related field
Ph.D. in Electrical or Computer Engineering (preferred)
Bachelor’s degree in Engineering, Information Systems, Computer Science, or related field

Tools

Simplis/Simetrix
ADS
ANSYS SIwave
HFSS
Cadence Sigrity PowerDC/PowerSI

Job description

Qualcomm Technologies, Inc. is seeking an experienced Power Delivery and Power Integrity Architect to define and verify end‑to‑end PDN solutions for data-center platforms.

You will collaborate with SoC, firmware, memory vendors, packaging, and platform teams to drive VR implementations and PDN modeling from die to system. The role requires strong PI fundamentals, multi‑phase VR design, and hands‑on experience with PI tools.

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