Physical Design Technical Leader

MediaTek Research Lab Inc.; San Jose (CA); On-site; USD 179,000 - 286,000; Full time

Benefits offered by this job

Comprehensive health insurance

401(k) plan

Paid holidays and sick leave

Parental leave

Job summary

MediaTek Research Lab Inc. is looking for highly skilled Physical Design Technical Leaders in San Jose, California. The role involves guiding customers, developing physical design flows, and ensuring high-quality tape-outs.

The ideal candidate will have over 10 years of experience in physical design with a strong knowledge of advanced nodes and low-power design techniques. This position offers a competitive salary range of $179,000 – $286,000, with performance bonuses and benefits including health insurance and 401(k).

Qualifications

• 10+ years of experience in physical design and flow development.
• Experience with advanced nodes (e.g., 4nm, 3nm, 2nm).
• Familiar with design for testability methodologies.

Responsibilities

• Guide customers in selecting optimal EDA tools and methodologies.
• Perform and review checks ensuring tape-out quality meets standards.
• Drive physical design flow development from RTL to GDSII.

Skills

Physical design experience

Flow development expertise

Low-power design techniques

Knowledge of EDA tools

Knowledge of floorplanning and timing closure

Job description

We are seeking highly skilled Physical Design Technical Leaders to join our team. The ideal candidates will have extensive experience in physical design and flow development, with a strong background in advanced nodes and low‑power design techniques.

As a Physical Design Technical Leader, you will guide customers, drive the development and execution of physical design flows, and collaborate with various teams to optimize methodologies and ensure high‑quality tape‑outs.

• Guide customers in selecting optimal EDA tools, implementation flows, and methodologies.
• Perform and review physical design checks to ensure customer tape‑out quality meets MediaTek’s standards.
• Drive the development and execution of the physical design flow from RTL to GDSII.
• Possess deep knowledge of floorplanning, placement, routing, timing closure, IR/EM analysis and fixing, DRC, and LVS.
• Collaborate with various teams, including design, flow, implementation, EDA vendors, and IT/infrastructure, to optimize flow and methodology.
• Develop and maintain in-house methodologies and flows.

Main Requirements and Qualifications

• 10+ years of experience in physical design and flow development.
• Experience with advanced nodes (e.g., 4nm, 3nm, 2nm).
• Familiarity with design for testability methodologies.
• Deep knowledge of low‑power design and implementation techniques.
• Experience with CoWoS‑S/CoWoS‑L/EMIB and 3DIC implementations is a plus.
• Salary range: $179,000 – $286,000.
• Employee may be eligible for performance bonus, short and long‑term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience and qualifications. In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, company‑paid holidays, sick leave, vacation time, parental leave, 401(k) and more.
• MediaTek is an Equal Opportunity Employer committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.