Physical Design Engineer

Apple Inc.; Cupertino, Northern (CA, KY); Hybrid; USD 150,000 - 225,000; Full time

Benefits offered by this job

Employee stock programs

Employee Stock Purchase Plan

Health and dental coverage

Job summary

Apple Inc. in Cupertino, CA, seeks a senior hardware design engineer to drive partition architecture, execute netlist to GDS2 flows, and coordinate cross-functional teams for successful design bring-up.

You will perform physical and electrical verification, work with timing and power teams, and ensure manufacturability with DFT and RC network analysis.

This role offers a base pay range of $150,400 to $225,300 per year, benefits, stock programs, and relocation support.

Qualifications

• Master’s degree in Electrical and Computer Engineering or related field.
• 1 year of related experience in hardware design.
• Scripting TCL/Python/Perl to automate PNR flows.
• Experience with Place and Route (PNR) to map logic to hardware.
• Using EDA tools for PNR analytics.
• Static Timing Analysis (STA) to ensure timing.
• EMIR for planning power structures in designs.
• PDV to ensure manufacturability of designs.
• DFT to assess test impact on design.
• RC networks to analyze inter-block connectivity.

Responsibilities

• Understand partition architecture and drive early physical design.
• Complete netlist to GDS2 implementation for partitions meeting schedule.
• Perform physical and electrical verification and signoff.
• Coordinate with power, DFT, and partition owners for pin assignments and floor planning.
• Communicate with timing, physical and electrical teams to close design signoffs.

Skills

Scripting TCL/Python/Perl

PNR flows

EDA tools

STA

EMIR

PDV

DFT

Digital circuit design

RC networks

Education

Master’s degree in Electrical and Computer Engineering

Tools

EDA tools

Job description

Cupertino, California, United States Hardware

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Work with logic design team to understand partition architecture and drive physical aspects early in design cycle. Complete netlist to GDS2 implementation for partition(s) meeting schedule and design goals. Time physical & electrical verification, drive the signoff closure for the partitions. Resolve design and flow issues related to physical design, identifying potential solutions, and driving execution. Work with the logic design team to understand design architecture and drive physical aspects early in design cycle. Complete netlist to GDS2 implementation for designs meeting schedule and design goals. Communicate with cross functioning teams like power and DFT to ensure proper bring up of designs. Communicate with various partition owners to ensure proper pin assignment and floor planning agreement. Work with timing, physical & electrical verification, drive the signoff closure for the designs. Resolve design and flow issues related to physical design, identify potential solutions, and drive execution. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location.PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Minimum Qualifications

• Master’s degree or foreign equivalent in Electrical and Computer Engineering or related field and 1 year of experience in the job offered or related occupation.
• Experience and/or education must include:
• Scripting TCL/Python/Perl to enable automation and customization of PNR flows
• Understanding Place and Route (PNR) flows to enable realization of logic functions into physical structures
• Utilizing Electronic Design Automation (EDA) tools to enable PNR activity and analysis of designs
• Utilizing Static Timing Analysis (STA) to analyze results of PNR activity and ensure timing requirements are met which ensure performance goals and design functionality
• Utilizing Electromigration and IR Analysis (EMIR) to plan design power structures and analyze results of PNR activity to ensure performance goals and manufacturability
• Utilizing Physical Design Verification (PDV) to ensure manufacturability of designsN/A
• Experience in Design for Test (DFT) for understanding of the impact of testing requirements on design requirements
• Experience in digital circuit design for understanding functions within a design
• Utilizing RC networks to understand impact of wiring and connectivity between blocks and devices in a design

Preferred Qualifications

• N/A

This position is not subject to the application limits.

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Apple accepts applications to this posting on an ongoing basis.