Enable job alerts via email!

Physical Design Engineer

Apple Inc.

Cupertino (CA)

On-site

USD 175,000 - 265,000

Full time

14 days ago

Boost your interview chances

Create a job specific, tailored resume for higher success rate.

Job summary

A leading company in the tech industry seeks a Physical Design Engineer in Cupertino, California. The role involves physical design verification, working with VLSI and ensuring successful silicon signoff. Applicants should have a Bachelor's degree and extensive experience in digital design and verification tasks, with competitive compensation and benefits.

Benefits

Comprehensive medical and dental coverage
Retirement benefits
Discounted products and free services
Educational reimbursement for formal education
Participation in employee stock programs
Possibility of discretionary bonuses or commission

Qualifications

  • 5 years of progressive experience in the occupation is required.
  • Experience with very-large-scale integration (VLSI) design.
  • Experience in physical verification and automation.

Responsibilities

  • Responsible for physical design verifications including SOC methodologies.
  • Work on block interface issues and floor planning.
  • Execute physical verification runs and provide detailed documentation.

Skills

VLSI design
Logic design
Data path analysis
Digital design flow
Floor planning
Physical design routing
Physical verification
TCL scripting
Power analysis
Static timing analysis

Education

Bachelor’s degree in Electrical Engineering or related field

Tools

PnR CAD tools
PDV (Calibre) CAD tools

Job description

Cupertino, California, United States Hardware

Add to Favorites Physical Design Engineer

Description

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Responsible for all aspects of physical design verifications including: physical verification methodology for SOC, full chip integration flows, physical verification convergence, and closure, and final signoff. Apply knowledge of detailed block level analysis, work on chip floor planning and block interface issues, and understand deep submicron process technology. Work with process variation, various timing margins and derates, and detailed tool /runset settings. Work with both Physical Design Engineers and foundry for new PDK evaluation and qualification, block level physical verification debugging, full chip level debug and rule settings, and work on detailed specifications for block, block assemble level, and full chip level validation specs. Execute physical verification runs, maintain and innovate scripts and infrastructure, and provide documentation for guidelines and specs. Apply strong signoff ownership to ensure first silicon success. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $175,800 - $264,200/yr and your base pay will depend on your skills, qualifications, experience, and location.PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Minimum Qualifications
  • Bachelor’s degree or foreign equivalent in Electrical Engineering or related field, and 5 years of progressive, post baccalaureate experience in the job offered or related occupation.
  • 5 years of experience with each of the following skills is required:
  • Utilizing very-large-scale integration (VLSI) design and experience understanding logic design, data path analysis and digital design flow.
  • Experience in floor planning, placement and optimization, physical design routing and physical verification, using PnR and PDV (Calibre) CAD tools.
  • Experience performing automation, writing scripts and implementing design, using tool command language (TCL) and shell scripting.
  • Experience in Power, Performance and Area analysis
  • Analyzing Static timing and Static & Dynamic voltage
  • Experience in Physical verification, and experience in layout versus schematic checks.
  • Understanding of device physics, semiconductor process and interconnect electrical behaviors, including experience identifying solutions with signoff check violations.
Preferred Qualifications
  • N/A

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .

Add to Favorites Physical Design Engineer

Get your free, confidential resume review.
or drag and drop a PDF, DOC, DOCX, ODT, or PAGES file up to 5MB.

Similar jobs

Physical Design Engineer

AECOM

Cupertino

On-site

USD 143,000 - 215,000

Yesterday
Be an early applicant

Physical Design Engineer

Central Business Solutions, Inc

San Jose

Remote

USD 200,000 - 250,000

30+ days ago

Senior SoC RTL Design Engineer (remote)

Chelsea Search Group, Inc.

San Jose

Remote

USD 140,000 - 210,000

2 days ago
Be an early applicant

Physical Design Engineer, Custom Datapath

Google Inc.

Sunnyvale

On-site

USD 183,000 - 271,000

3 days ago
Be an early applicant

Senior Substation Design Engineer

Transcend

San Francisco

Remote

USD 120,000 - 250,000

9 days ago

Physical Design Engineer

Eridu AI

Saratoga

On-site

USD 210,000 - 260,000

15 days ago

Senior Human Factors Design Engineer

AECOM

Los Angeles

Remote

USD 120,000 - 180,000

2 days ago
Be an early applicant

U.S. Navy Facilities Design Engineer Subject Matter Expert

ERG

Remote

USD 150,000 - 180,000

Today
Be an early applicant

U.S. Navy Facilities Design Engineer Subject Matter Expert

Eastern Research Group

Maryland

Remote

USD 150,000 - 180,000

Yesterday
Be an early applicant