PHY Design Verification Engineer

Apple Inc.

San Francisco (CA)

On-site

USD 129,000 - 225,000

Full time

14 days+

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Job summary

Apple in the San Francisco Bay Area seeks a PHY Design Verification Engineer to join a wireless silicon team responsible for energy-efficient SoCs and integration with RF/Analog blocks.

You will build reusable test benches, develop directed and constrained random tests, analyze coverage, and use AI techniques to identify DV issues, with Palladium/FPGA validation support and close collaboration with design teams.

Qualifications

  • Bachelor's degree in Electrical Engineering or related field.
  • 2+ years of wireless/wired verification experience.
  • Advanced knowledge of Verilog, SystemVerilog, UVM, and SystemVerilog Assertions.
  • Experience with ASIC verification flows including test bench development, constrained random testing, and coverage.
  • Proficiency in Matlab and Python.
  • Experience with Palladium/FPGA validation.
  • Knowledge of wireless protocols such as Bluetooth, WLAN, or Zigbee.

Responsibilities

  • Review PHY subsystem microarchitecture and create verification plans.
  • Build test benches with reusable architecture.
  • Develop directed and constrained random tests, debug and track bugs.
  • Create and analyze coverage models and add test cases to improve coverage.
  • Apply AI techniques to identify DV issues and improve quality.
  • Support PHY validation using Palladium and/or FPGA.
  • Collaborate with team to improve DV methodology and flow.

Skills

Verilog
SystemVerilog
UVM
SystemVerilog Assertions
Matlab
Python
Shell scripting
Perl scripting
AI data mining
Palladium
FPGA validation
Wireless protocols
Team player

Education

Bachelor's degree
MSEE

Tools

Matlab
Python

Job description

San Francisco Bay Area, California, United States Hardware

Would you like to join Apple’s growing wireless silicon development team? Our wireless SoC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Design Verification, Emulation, Test and Validation, and FW/SW engineering.

Description

In this highly visible role, you will be at the center of a silicon design group with a critical impact on delivering world-class silicon to empower wireless products for hundreds of millions of customers. As a PHY Design Verification Engineer, you will be responsible for pre-silicon RTL verification of wireless PHY and its interfaces with the rest of the wireless communication SoC. You will interact with DV methodologists, designers, and communication systems engineers to develop reusable testbench and verification environment deploying the latest methodology with metric-driven verification, ensuring the highest design quality.

Responsibilities
  • Work closely with the system and design teams to review and understand the PHY subsystem microarchitecture, and create verification plans from specifications, review and refine to achieve coverage targets.
  • Build block/subsystem level test benches with a reference model, using the best-in-class DV methodology. Architect test benches with maximum reusability in mind.
  • Develop and execute both directed and constrained random tests, debug failures, manage bug tracking, and work with designers to drive closure of issues found.
  • Create and analyze block/subsystem-level coverage models, and add test cases to increase coverage.
  • Use machine learning and AI technologies to identify design and test bench issues and ensure DV quality.
  • Support PHY subsystem validation using Palladium and/or FPGA.
  • Work with team members to improve DV methodology and flow.
Minimum Qualifications
  • Minimum requirement of a bachelors degree
Preferred Qualifications
  • MSEE with 2+ years of verification experience of wireless/wired communication block/subsystem.
  • Advanced knowledge of Verilog, SystemVerilog, UVM, and SystemVerilog Assertion.
  • Excellent knowledge and experience of ASIC verification flows including test bench development, constrained random testing, and code/functional coverage.
  • Experience of using Matlab/C reference model and bit-accurate verification.
  • Verification experience of wireless/wired communication block/subsystem.
  • Knowledge of wireless protocols such as Bluetooth, UWB, WLAN, or Zigbee.
  • Proficient in shell and Python scripting, Perl scripting.
  • Experience of using AI technologies in data mining/analysis.
  • Experience of Palladium/FPGA validation.
  • Should be a team player with excellent communication skills, self-motivated and well organized.

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $129,300 and $225,300, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.

Apple accepts applications to this posting on an ongoing basis.

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