Photonic Layout Engineer for Quantum PICs

IC Resources; Maryland; On-site; USD 110,000 - 170,000; Full time

Benefits offered by this job

Competitive compensation

Equity

Annual performance bonus

Comprehensive benefits

Job summary

IC Resources in College Park, Maryland, is seeking a Photonic Layout Engineer to join its hardware design team. You will lead the layout and tape-out of Photonic Integrated Circuits (PICs) for quantum hardware contexts.

You will apply Python-based workflows to generate GDS layouts, verify with DRC/LVS, and contribute to PDK development while coordinating with design, fabrication and test teams to ensure manufacturability. This role offers competitive compensation and equity.

Qualifications

• Hands-on PIC layout experience required.
• Experience moving photonic layouts to fabrication.
• 2+ years Python for photonic mask/layout.
• Familiar with DRC/LVS and layout-rule driven design.
• Degree in Photonics/Physics/EE or equivalent.

Responsibilities

• Develop and own layouts for complex Photonic Integrated Circuits (PICs).
• Arrange and route photonic components across multi-layer chip designs.
• Account for electrical, metal and CMOS routing constraints during photonic layout.
• Generate large-scale GDS / mask layouts using Python-based design workflows.
• Support chip and reticle-level layout through foundry tape-out.
• Perform layout verification including DRC and LVS.
• Contribute to the development and maintenance of custom photonic PDKs.
• Work with photonic designers to integrate components including waveguides, splitters and couplers.
• Collaborate with fabrication, test and packaging teams to establish design rules.
• Document layout methodologies and final tape-out files.

Skills

PIC layout

Python scripting

DRC/LVS

Education

Photonics/Physics/EE degree

Tools

gdsfactory

Luceda IPKISS

KLayout

Job description

IC Resources in College Park, Maryland, is seeking a Photonic Layout Engineer to join its hardware design team. You will lead the layout and tape-out of Photonic Integrated Circuits (PICs) for quantum hardware contexts.

You will apply Python-based workflows to generate GDS layouts, verify with DRC/LVS, and contribute to PDK development while coordinating with design, fabrication and test teams to ensure manufacturability. This role offers competitive compensation and equity.