PhD Hardware ML Research Intern — Low-Latency Inference

IMC; Chicago (IL); Hybrid; USD 203,000 - 248,000; Part time

Job summary

IMC is seeking a PhD candidate to drive ML research directly on custom hardware, focusing on low-latency inference and acceleration. You will own a project from concept to prototype, collaborating with hardware engineers and presenting results to the team.

You will explore NAS, quantization, and ML systems concepts, translating research into tangible performance gains for real-world workloads, with mentoring from RTL developers.

Qualifications

• Enrolled in a PhD program in Electrical Engineering, Computer Science, Physics, or related field.
• Strong understanding of hardware constraints and ML mapping to FPGAs/ASICs.
• Experience with HDL, HLS or ML-to-hardware frameworks (hls4ml, FINN, Vitis AI).
• Understanding of ML fundamentals and frameworks (PyTorch/TensorFlow).
• Proficiency in Python; strong communication and collaboration skills.

Responsibilities

• Architect and develop an ML research project based on real-world use cases.
• Work hands-on with hardware engineers to deploy ML inference solutions.
• Track and evaluate emerging research in NAS, ML systems and quantization; assess practical improvements.
• Present project findings to the team; build a prototype or benchmark.
• Learn RTL concepts from developers and apply to industry.
• Evaluate research from academic and real-world cost/impact perspectives.

Skills

PhD candidate in EE/CS/Physics

Hardware constraints & ML mapping

HDL/HLS or ML-to-hw frameworks

ML fundamentals & frameworks

Python proficiency

Cross-disciplinary collaboration

Education

PhD program in EE/CS/Physics

Tools

hls4ml

FINN

Vitis AI

Job description

IMC is seeking a PhD candidate to drive ML research directly on custom hardware, focusing on low-latency inference and acceleration. You will own a project from concept to prototype, collaborating with hardware engineers and presenting results to the team.

You will explore NAS, quantization, and ML systems concepts, translating research into tangible performance gains for real-world workloads, with mentoring from RTL developers.