Machine Learning Hardware Engineer (HW/SW Co-Design)

Fintal Partners; Chicago (IL); On-site; USD 140,000 - 230,000; Full time

Job summary

Fintal Partners in Chicago is seeking researchers and engineers to architect ML models co-designed with traders and software teams, accounting for latency budgets and hardware constraints. You will help shape our custom hardware roadmap and collaborate with hardware engineers from concept to production.

The role blends ML, hardware, and software, requiring understanding of neural networks, quantization, and inference optimization.

Qualifications

• Solid understanding of hardware constraints and design trade-offs when mapping ML models to FPGA/ASICs.
• Experience with HDL, HLS, or ML-to-hardware frameworks such as hls4ml, FINN, or Vitis AI.
• Foundations in machine learning: neural networks, inference optimization, quantization with PyTorch/TensorFlow.
• Proficiency in Python, C++, or similar languages for tooling, testing, and simulation.

Responsibilities

• Architect and co-design ML models with traders, quant researchers, and software engineers, treating hardware constraints as first-class inputs.
• Shape our custom hardware roadmap by translating ML model requirements into architectural decisions.
• Work hands-on with hardware engineers to implement, verify, and deploy ML inference solutions from proof-of-concept to production.
• Track and evaluate emerging research in neural architecture search, ML systems, and quantization, translating findings into measurable improvements.

Skills

Hardware-aware ML design

HDL (VHDL/SystemVerilog)

ML frameworks (PyTorch/TensorFlow)

Python & C++ tooling

Cross-functional collaboration

Education

MS or PhD in EE/CS/Physics

Tools

HLS tools

hls4ml

FINN

Vitis AI

ML compiler stacks (MLIR/TVM/XLA)

Job description

We are a global trading firm powered by a cutting-edge research environment and a world-class technology backbone. For decades, we’ve been a stabilizing force in financial markets, providing essential liquidity upon which market participants depend. Across our offices in the US, Europe, Asia Pacific, and India, our talented quant researchers, engineers, traders, and business operations professionals are united by our uniquely collaborative, high-performance culture, and our commitment to giving back. From entering dynamic new markets to embracing disruptive technologies, and from developing an innovative research environment to diversifying our trading strategies, we dare to continuously innovate and collaborate to succeed.

We are deploying machine learning directly onto custom hardware – and we want you to help drive it from the ground up. This is an initiative where you'll have the rare opportunity to architect solutions from scratch, influence technical research direction, and see your work drive real impact in one of the most demanding computing environments in the world.

We build the hardware, the software, and the infrastructure, so when you hit a bottleneck, you can fix it - there's no vendor to wait on and no abstraction layer you're not allowed to touch. If you've ever wanted to push the boundaries of what's computationally possible, this role is for you. We're looking for researchers and experienced engineers from any background. Trading experience is a bonus, not a prerequisite.

Your Core Responsibilities

• Architect and co-design ML models with traders, quant researchers, and software engineers, treating hardware constraints (latency budgets, resource limits, numerical precision) as first-class design inputs
• Shape our custom hardware roadmap by translating ML model requirements into concrete architectural decisions
• Work hands-on with hardware engineers to implement, verify, and deploy ML inference solutions from proof-of-concept through production
• Track and evaluate emerging research in neural architecture search, machine learning systems and quantization methods, and determine what translates to measurable improvements in our systems

Your Skills and Experience

• Solid understanding of hardware constraints and design trade-offs (e.g., pipelining, resource utilization, fixed-point arithmetic) that shape how ML models can be efficiently mapped onto FPGAs or custom ASICs
• Experience with hardware fundamentals, whether through VHDL/SystemVerilog development, HLS tools, or ML-to-hardware frameworks like hls4ml, FINN, or Vitis AI
• Understanding of machine learning fundamentals – neural network architectures, inference optimization, quantization techniques, ML frameworks such as PyTorch/TensorFlow
• Proficiency in Python, C++, or similar languages for tooling, testing, and simulation
• Strong communication skills and ability to work collaboratively across disciplines with both technical and non-technical teams

Nice to Have

• Exposure to ML compiler infrastructure such as MLIR, TVM, XLA, or similar tools for lowering and optimizing models for hardware targets
• Background in latency-sensitive or resource-constrained systems including high-frequency trading, particle physics data acquisition, real-time signal processing, or similar domains
• Familiarity with functional verification methodologies (for example SystemVerilog, UVM, Cocotb)
• Advanced degree (MS or PhD) in EE, CS, Physics, or related field, or equivalent depth through industry or research experience