PhD Hardware Engineer — AI Hardware R&D

Cisco; San Jose (CA); On-site; USD 34,000 - 44,000; Full time

Benefits offered by this job

Medical, dental, and vision insurance

401(k) with Cisco matching

Paid parental leave

Disability and life insurance

Stock grants or RSUs

Bonuses for non-sales roles

Job summary

Cisco is seeking an internship candidate to assist with the design and validation of a server sub‑system within the Common Hardware Group. You will work on independent tasks, participate in cross‑functional meetings, and help create functional specs and technical documentation.

The role emphasizes hardware engineering, test scripting in Python, and collaboration across teams. Ideal for a PhD student continuing enrollment, with exposure to lab equipment and design tools like Cadence Concept and

Qualifications

• Currently enrolled in a PhD program.
• Qualifying education should be in Hardware Engineering or a related field.
• Expected to continue enrollment in degree program following completion of the internship.
• Experience creating test scripts in Python.
• Experience collaborating with cross‑functional teams.

Responsibilities

• Assist with the design and validation of a server sub-system.
• Ensure design meets functional specs.
• Work independently on assigned tasks.
• Participate in cross‑functional meetings and teams.
• Participate in creating functional specifications and technical documentation.

Skills

Python scripting

Cross-functional collaboration

Communication skills

Education

PhD program enrollment

Tools

Oscilloscopes

Logic Analyzers

Spectrum Analyzers

Cadence Concept

Allegro

Job description

Cisco is seeking an internship candidate to assist with the design and validation of a server sub‑system within the Common Hardware Group. You will work on independent tasks, participate in cross‑functional meetings, and help create functional specs and technical documentation.

The role emphasizes hardware engineering, test scripting in Python, and collaboration across teams. Ideal for a PhD student continuing enrollment, with exposure to lab equipment and design tools like Cadence Concept and