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Benefits offered by this job
Highly competitive compensation package
Benefits
Equal opportunity employer
Job summary
A cutting-edge technology firm is seeking a Physical Design Intern to work hands-on from synthesis through tapeout in Santa Clara, CA. You will analyze and improve design Power, Performance, and Area (PPA), collaborate with teams to influence early design decisions, and implement new flows for optimization. The ideal candidate is pursuing a degree in Electrical Engineering or Computer Science and has a solid understanding of VLSI and scripting skills. Compensation is competitively set at $50/hr - $70/hr based on experience.
Qualifications
Solid understanding of logic design, VLSI, and transistor-level concepts.
Familiar with PnR tools, timing analysis, and power optimization techniques.
Comfortable scripting in Tcl, Perl, Shell, or Python.
Responsibilities
Analyze and improve design PPA (Power, Performance, Area).
Collaborate with front-end, PD, and architecture teams to influence early design decisions.
Explore and implement new flows, tools, or RTL experiments to optimize designs.
Skills
Logic design
VLSI concepts
Transistor-level concepts
PnR tools
Timing analysis
Power optimization techniques
Scripting in Tcl
Scripting in Perl
Scripting in Shell
Scripting in Python
Education
Currently pursuing a BS, MS, or PhD in EE, ECE, CE, or CS
Job description
A cutting-edge technology firm is seeking a Physical Design Intern to work hands-on from synthesis through tapeout in Santa Clara, CA. You will analyze and improve design Power, Performance, and Area (PPA), collaborate with teams to influence early design decisions, and implement new flows for optimization. The ideal candidate is pursuing a degree in Electrical Engineering or Computer Science and has a solid understanding of VLSI and scripting skills. Compensation is competitively set at $50/hr - $70/hr based on experience.