Physical Design Intern - CPU/AI Silicon

Austin Community College; Santa Clara (CA); On-site; USD 68,880 - 96,432; Full time

Benefits offered by this job

Highly competitive compensation package

Benefits

Equal opportunity employer

Job summary

A cutting-edge tech firm is seeking a Physical Design Intern in Santa Clara, CA, to work hands-on with top engineers from synthesis through tapeout. You will analyze and improve design aspects while exploring innovative tools. Candidates pursuing a degree in EE, ECE, CE, or CS, with a solid understanding of logic design and VLSI, are encouraged to apply. This position offers competitive hourly compensation and opportunities for learning in advanced chip development environments.

Qualifications

• Must analyze and improve design PPA (Power, Performance, Area).
• Collaborate with front-end, PD, and architecture teams.
• Explore and implement new flows or tools.

Responsibilities

• Work hands-on from synthesis through tapeout.
• Collaborate with engineers to optimize designs.
• Gain experience in end-to-end physical design flow.

Skills

Logic design

VLSI

Transistor-level concepts

Scripting in Tcl, Perl, Shell, or Python

Education

Currently pursuing a BS, MS, or PhD in EE, ECE, CE, or CS

Tools

PnR tools

Timing analysis

Power optimization techniques

Job description

A cutting-edge tech firm is seeking a Physical Design Intern in Santa Clara, CA, to work hands-on with top engineers from synthesis through tapeout. You will analyze and improve design aspects while exploring innovative tools. Candidates pursuing a degree in EE, ECE, CE, or CS, with a solid understanding of logic design and VLSI, are encouraged to apply. This position offers competitive hourly compensation and opportunities for learning in advanced chip development environments.