Onsite FPGA Design Engineer — Secret Clearance

Solidus Technical Solutions, LLC; Tucson (AZ); On-site; USD 120,000 - 150,000; Full time

Benefits offered by this job

Generous PTO

Outstanding benefits

Job summary

Solidus is seeking a seasoned FPGA Design and Verification Engineer to develop and verify high-performance hardware designs in Tucson, AZ. You will drive full lifecycle from requirements through integration and testing, using VHDL on Xilinx or Microsemi platforms.

Responsibilities include producing production FPGA releases, designing architectures, translating requirements to FPGA specs, and rigorous verification with constrained random tests. Active Secret clearance required.

Qualifications

• Active Secret clearance is required.
• Bachelor's degree with 5+ years of relevant experience, OR Master's degree with 6+ years of relevant experience.
• Cultural fit amongst a collaborative team environment.
• Minimum 8 years of experience to include at least 1 of the following: Digital design and VHDL coding, Xilinx or Microsemi devices and flow tools, Delivering FPGA solutions to system level applications, Hands on experience with integration and debug.

Responsibilities

• Design and deliver production quality FPGA releases from initial proof of concept up to production.
• Architect FPGA-based systems to determine parts, interfaces, and CONOPS.
• Translate system level requirements into FPGA requirements.
• Design and code in VHDL for reliability and maintainability.
• Verify designs utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage.
• Help drive projects and execute to program schedules on time and budget.
• Create complete documentation including requirements, verification plan, and user''s guides.
• May support internal and external technical reviews.
• Other duties as assigned.

Skills

VHDL

Digital design

Verification

FPGA

Team collaboration

Communication

Education

Bachelor's degree

Master's degree

Tools

Xilinx tools

Microsemi tools

UVM verification

Job description

Solidus is seeking a seasoned FPGA Design and Verification Engineer to develop and verify high-performance hardware designs in Tucson, AZ. You will drive full lifecycle from requirements through integration and testing, using VHDL on Xilinx or Microsemi platforms.

Responsibilities include producing production FPGA releases, designing architectures, translating requirements to FPGA specs, and rigorous verification with constrained random tests. Active Secret clearance required.