New Grad ASIC Design Engineer – GPU/SoC, Equity Eligible

NVIDIA Corporation; Santa Clara (CA); On-site; USD 110,000 - 190,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA Corporation in Santa Clara, CA seeks an ASIC Design Engineer at the New College Graduate level to implement high-performance RTL for leading SoCs and GPUs. You will analyze trade-offs, craft micro-architecture, and collaborate across verification, synthesis, and back-end teams on IPs like schedulers and DMA engines.

The role requires a BS/MS in EE/CE/CS or related field, with strong Verilog RTL experience and good teamwork.

Qualifications

• Pursuing or recently completed a BS or MS in Electrical Engineering, Computer Engineering or Computer Science or related field or equivalent experience.
• Knowledge of micro-architecture and RTL development (Verilog).
• Good understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis.
• Exposure to Digital systems and VLSI design, Computer Architecture, Computer Arithmetic is required.
• Strong interpersonal skills and an excellent teammate.

Responsibilities

• As a key member of the GPU Design team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
• Analyze architectural trade-offs based on features, performance requirements and system limitations.
• Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design.
• Collaborate and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams to accomplish your tasks.
• Work on a broad list of IPs such as GPU's work scheduler, time distribution system, interrupt controllers, and DMA engines.
• Architect features to help silicon debug and support post-silicon validation activities.

Skills

Verilog RTL

C/C++

Python

ASIC design flow

Digital systems

VLSI design

Computer architecture

Teamwork

Education

BS in Electrical/Computer Engineering or CS

MS in EE/CE/CS

Tools

EDA tools

RTL tooling

Job description

NVIDIA Corporation in Santa Clara, CA seeks an ASIC Design Engineer at the New College Graduate level to implement high-performance RTL for leading SoCs and GPUs. You will analyze trade-offs, craft micro-architecture, and collaborate across verification, synthesis, and back-end teams on IPs like schedulers and DMA engines.

The role requires a BS/MS in EE/CE/CS or related field, with strong Verilog RTL experience and good teamwork.