NAND Array Engineer — Hybrid, 3D NAND Impact

Solidigm Inc.; Rancho Cordova (CA); Hybride; USD 140 000 - 255 000; Plein temps

Avantages offerts par ce poste

RSU

RCU

Cash bonus program

Benefits package

Résumé du poste

Solidigm, based in California, is seeking a highly skilled NAND Array Engineer to shape the future of 3D NAND technology within our Performance and Reliability Team. You will drive characterization of array erase, program, and read operations and lead trim development for next-generation products.

You will collaborate with Device, Design, Reliability, and Product/Test Engineering to run bench experiments, analyze data, and build predictive models.

Qualifications

• Master's or PhD in Electrical Engineering, Microelectronics, or a closely related field.
• 3+ years of industry experience in semiconductor memory technologies and products.
• Strong understanding of NAND cell and array operations, including array reliability physical mechanisms and characterization techniques.
• Strong foundation in semiconductor device physics and process flows.
• Proficiency in statistical analysis methodologies and tools.
• Hands-on programming experience in C, C++, Python, and/or JMP.
• Proven ability to thrive in a fast-paced, cross-functional team environment.
• Strong analytical and problem-solving skills with attention to detail.
• Excellent communication and presentation skills, with the ability to convey complex technical concepts to diverse audiences.

Responsabilités

• Design, plan, and execute NAND memory cell and array characterization experiments to evaluate performance and reliability.
• Develop and optimize trims to improve Read Window Budget (RWB) and Raw Bit Error Rate (RBER), directly impacting product quality.
• Apply NAND device physics principles to explain and interpret relationships between experimental data and trim parameters.
• Collaborate cross-functionally with Device, Design, Reliability, and Product/Test Engineering teams to design and execute bench experiments.
• Interface with wafer fabrication teams to drive Sort and Wafer-Level Reliability (WLR) Design of Experiments (DOEs).
• Conduct comprehensive data analysis to identify and communicate trade-offs across multiple parameters of interest.
• Build predictive models for NAND behavior based on empirically observed data.
• Develop and maintain scorecards to track NAND device degradation through various physical mechanisms over time.
• Release optimized trims to the production flow on a regular cadence to ensure continuous product improvement.
• Drive improvements in back-end test yields through trim optimization and advanced screening techniques.

Connaissances

NAND memory technologies

Statistical analysis

C/C++/Python

Cross-functional teamwork

Data interpretation

Problem solving

Communication skills

Formation

M.S./Ph.D. in Electrical Engineering or Microelectronics

Outils

JMP

Description du poste

Solidigm, based in California, is seeking a highly skilled NAND Array Engineer to shape the future of 3D NAND technology within our Performance and Reliability Team. You will drive characterization of array erase, program, and read operations and lead trim development for next-generation products.

You will collaborate with Device, Design, Reliability, and Product/Test Engineering to run bench experiments, analyze data, and build predictive models.