Module Defect Inspection Engineer — Yield & Innovation

Intel Corporation; Hillsboro (OR); On-site; USD 134,000 - 189,000; Full time

Job summary

Intel in Hillsboro, Oregon, seeks a Module Development Engineer, Defect Inspection, to develop, optimize, and scale defect inspection solutions for current HVM and future nodes. You will collaborate across engineering, suppliers, and research teams to improve inspection capability and drive yield improvements.

The role requires a strong foundation in SPC/DOE, semiconductor processing, and packaging processes with a track record of process improvement and automation.

Qualifications

• Bachelor’s degree in Materials Science, Mechanical Engineering, Chemical Engineering, Electrical Engineering, Physics, Chemistry, or related field + 4 years of experience.
• Master’s degree in the same field with 3+ years of experience and a PhD with 2+ years of experience.

Responsibilities

• Develop and implement defect inspection and metrology technologies for semiconductor manufacturing.
• Design and optimize processes, inspection methods, and equipment performance.
• Conduct process experimentation and feasibility studies using statistical and engineering methods (DOE, SPC).
• Collaborate with equipment and materials suppliers to introduce new technologies.
• Analyze defect data to identify root causes and improve yield and quality.
• Drive continuous improvement of inspection systems through automation, software, and hardware enhancements.
• Support technology pathfinding and roadmap development for next-generation products.
• Stay current with industry trends, emerging tools, and inspection methodologies.

Skills

Statistical Process Control (SPC)

Design of Experiments (DOE)

Semiconductor manufacturing knowledge

Education

Bachelor's degree + 4 years experience

Master's degree + 3+ years

PhD + 2+ years

Tools

Packaging processes

Equipment automation development

Project management

Job description

Intel in Hillsboro, Oregon, seeks a Module Development Engineer, Defect Inspection, to develop, optimize, and scale defect inspection solutions for current HVM and future nodes. You will collaborate across engineering, suppliers, and research teams to improve inspection capability and drive yield improvements.

The role requires a strong foundation in SPC/DOE, semiconductor processing, and packaging processes with a track record of process improvement and automation.