ML ASIC Design Engineer - Hybrid

Waymo; Mountain View (CA); Hybrid; USD 175,000 - 215,000; Full time

Benefits offered by this job

Discretionary annual bonus

Equity incentive plan

Generous Company benefits

Job summary

Waymo’s Compute Team is building the hardware platform that runs the fully autonomous vehicle software stack. As a Senior Silicon Engineer, you will translate high level requirements into hardware features, design microarchitectures, and optimize digital ASIC designs for performance, power and area.

You will collaborate with researchers and architects, verify designs, and contribute to a high-performance compute stack used in autonomous driving. This role is hybrid in Mountain View, CA.

Qualifications

• BS degree in Computer Engineering or equivalent practical experience.
• 5+ years of industry experience with SystemVerilog, ASIC RTL design and microarchitecture.
• 3+ years designing and specifying microarchitectures of high performance computing cores (CPU/GPU/NPU).
• Fluency in at least one high level programming language such as Python, C++.

Responsibilities

• Translate high level requirements into hardware features with researchers and architects.
• Specify and design microarchitectures to deliver world class ML performance.
• Perform power, area and performance exploration and optimization of digital ASIC designs.
• Design high performance execution units, arithmetic circuits and programmable engines.
• Work with verification teams to guarantee functional correctness and performance.

Skills

Python

C++

SystemVerilog

ASIC RTL design

Microarchitecture

Education

BS degree in Computer Engineering

Tools

Chisel (Scala)

Job description

Waymo’s Compute Team is building the hardware platform that runs the fully autonomous vehicle software stack. As a Senior Silicon Engineer, you will translate high level requirements into hardware features, design microarchitectures, and optimize digital ASIC designs for performance, power and area.

You will collaborate with researchers and architects, verify designs, and contribute to a high-performance compute stack used in autonomous driving. This role is hybrid in Mountain View, CA.