Mixed-Signal Validation Engineer — Pre-Silicon Expert

Intel; Santa Clara (CA); Hybrid; USD 122,440 - 172,860; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Retirement plan

Vacation

Job summary

Intel is seeking a seasoned Engineer to define, develop, and perform pre-silicon functional validation for mixed-signal designs in the US California region. You will apply hardware and software techniques to ensure validation coverage and meet performance, power, and area goals.

You will collaborate with architecture, design, verification, board and manufacturing teams to improve validation strategies and processes for mixed-signal interfaces across Intel products.

Qualifications

• Experience with pre-silicon functional validation for mixed-signal design.
• Ability to develop validation plans and execute validation tasks.
• Review design changes for impact on validation plans and timelines.

Responsibilities

• Define and perform pre-silicon functional validation for mixed-signal designs.
• Develop validation infrastructure and test environments.
• Publish validation reports and communicate findings to teams.

Skills

SystemVerilog/UVM

Validation planning

Debug and triage

Cross-functional collaboration

Education

Bachelor's Degree in Computer Science/Engineering or STEM with 3+ years

Tools

SystemVerilog

OVM/UVM

Job description

Intel is seeking a seasoned Engineer to define, develop, and perform pre-silicon functional validation for mixed-signal designs in the US California region. You will apply hardware and software techniques to ensure validation coverage and meet performance, power, and area goals.

You will collaborate with architecture, design, verification, board and manufacturing teams to improve validation strategies and processes for mixed-signal interfaces across Intel products.