Senior Analog/Mixed Signal Design Engineer

Aeonsemi; Santa Clara (CA); On-site; USD 120,000 - 200,000; Full time

Benefits offered by this job

Competitive base salary and equity

Medical, dental, and vision benefits

401k plan with matching

Paid parental leave

Flexible paid time off

Job summary

Aeonsemi is seeking talented analog/mixed-signal design engineers to develop high-speed communication and timing ICs. Candidates must have proven records of designing complex ICs in advanced CMOS processes and bringing products to volume production.

Responsibilities include architecture, design, verification, supervising layout, and supporting test programs and lab characterization. A strong teamwork mindset and excellent communication are essential.

Qualifications

• MS or PhD in Electrical Engineering with minimum 2 years of experience.
• Strong fundamentals in circuit theory, signal processing, and physical design.
• Experience designing three or more of: ADCs, DACs, Filters, PLLs, DLLs, High-speed I/O, Clock and Data Recovery.

Responsibilities

• Architects, designs, and verifies circuits to meet product requirements.
• Supervise layout designer, hands-on layout of critical circuits when needed.
• Support product definition, test program development, and lab characterization.

Skills

Analog/mixed-signal design

High-speed I/O

Python programming

Team collaboration

Education

MS/PhD in Electrical Engineering

Job description

Founded in October 2018 by technology leaders in mixed signal, DSP, and systems design, Aeonsemi solves complex technical challenges in networking, computing, wireless infrastructure, industrial, and automotive applications with industry leading IC solutions.

Position:

We are looking for talented analog/mixed-signal design engineers to develop cutting edge high-speed communication and timing ICs. The candidate must have a proven record of designing complex ICs in state-of-the-art CMOS process technologies and successfully taken products into volume production.

Responsibilities:

• Architects, designs, and verifies circuits to meet product requirements
• Supervise layout designer, hands-on layout of critical circuits when needed
• Support product definition, test program development, and lab characterization

Requirements:

• M.S. or Ph.D. in Electrical Engineering with minimum 2 years of experience
• Strong fundamentals in circuit theory, signal processing, and physical design
• Advanced understanding of device noise, mismatch, linearity, and other impairments
• Experience designing three or more of the following: ADCs, DACs, Filters, PLLs, DLLs, High-speed I/O, Clock and Data Recovery
• Works well within a team
• Excellent written and verbal communication skills
• Python or other programming language preferred

Company Perks & Benefits:

• Competitive salary with annual base pay range $120k ~ $200k
• Equity award at a rapid growth startup company
• Medical, dental, and vision benefits
• 401k Plan and matching
• Paid parental leave
• Flexible paid time off

Location can be either:

Santa Clara, California, or Portland, OR