Mixed Signal Circuit Design Coop

Nokia

San Jose (CA)

On-site

USD 34,000 - 55,000

Full time

9 days ago

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Job summary

Nokia invites candidates currently pursuing a master’s degree or PhD in Electrical Engineering or Computer Engineering to join our team onsite in San Jose, CA for a 4+ month period from January 2027 to May 2027. You will design, simulate, and optimize high-speed analog circuits, including ADCs and DACs, and draft precise layout floor plans to maximize performance.

The role emphasizes exploring circuit topologies, behavior modeling, and collaboration with experienced engineers in a fast-paced

Qualifications

  • Candidate must be pursuing a master's or PhD in EE/CE at a US-accredited school.
  • Experience with analog/mixed-signal IPs and deep submicron CMOS is desirable.
  • Familiarity with layout effects and device physics is preferred.

Responsibilities

  • Design, implement, and simulate high-speed analog circuits including ADCs and DACs.
  • Create layout floor plans to optimize overall performance.
  • Explore trade-offs across circuit topologies.

Skills

Analog/Mixed-signal IPs
Device physics
Verilog-A/Verilog-AMS

Education

Master's or PhD in Electrical Engineering or Computer Engineering (US-accredited school)

Tools

Cadence Virtuoso
Spectre
Incisive
Calibre
EMX
Totem EM/IR

Job description

Educational Requirements

Currently a candidate for a master's degree or PhD in Electrical Engineering, Computer Engineering, or a related field with an accredited school in the US.

Job Description
  • Number of Position(s): 2
  • Duration: 4+ months
  • Dates: January 2027 - May 2027
  • Location: Onsite in San Jose, CA
Educational Requirements

Currently a candidate for a master's degree or PhD in Electrical Engineering, Computer Engineering, or a related field with an accredited school in the US.

How You Will Contribute And What You Will Learn
  • Design, implement, and simulate the functionality and performance of various high speed analog circuits, including the ADCs and DACs
  • Create the layout floor plans to optimize the overall performance
  • Exploring the trade-offs of the different circuit topologies
Key Skills And Experience
  • Familiarity with essential CAD tools, such as Cadence Virtuoso, Spectre, Incisive, Calibre, EMX, and Totem EM/IR, etc.
  • Familiarity with analog / mixed signal IPs or chips in deep submicron CMOS technologies.
  • Good understanding of device physics and the impacts of layout effects;
  • Familiarity with behavioral modeling the blocks and circuits with Verilog-A or Verilog-AMS
About Us

Advancing connectivity to secure a brighter world.

Nokia is a global leader in connectivity for the AI era. With expertise across fixed, mobile and transport networks, powered by the innovation of Nokia Bell Labs, we’re advancing connectivity to secure a brighter world.

Our recruitment process

We act inclusively and respect the uniqueness of people. Our employment decisions are made regardless of race, color, national or ethnic origin, religion, gender, sexual orientation, gender identity or expression, age, marital status, disability, protected veteran status or other characteristics protected by law. We are committed to a culture of inclusion built upon our core value of respect.

The length of the recruitment process may vary depending on the specific role's requirements. We strive to ensure a smooth and inclusive experience for all candidates.

About The Team

Some of our benefits for students in the US :

  • Flexible and hybrid working schemes to balance study, work, and life
  • Professional development events and networking opportunities
  • Well-being programs, including Personal Support Service 24/7 - a confidential support channel open to all Nokia employees and their families in challenging situations
  • Opportunities to join Nokia Employee Resource Groups (NERGs) and build connections across the organization
  • Employee Growth Solutions, mentorship programs, and coaching support for your career development
  • A learning environment that fosters both personal growth and professional development - for your role and beyond
Disclaimer for US/Canada

Nokia maintains broad annual base salary ranges for its roles in order to account for variations in knowledge, skills, experience and market conditions, and with consideration to internal peer equity. Check the salary ranges in the job info section for this role.

All North America job posts will post for a minimum of 3 calendar days and up to 180 days or until candidate/s identified.

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