Microprocessor Silicon Validation and Optimization Engineer-Staff

Qualcomm; San Diego (CA); On-site; USD 140,000 - 210,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking an ASIC Engineer in San Diego to define, model, and design IP for high‑performance, low‑power products. You will verify, validate, and implement complex IC blocks and collaborate with cross‑functional teams to meet system requirements.

The role emphasizes advanced architecture, design tools (RTL to GDS Flow, Virtuoso), and strong communication with leadership. 4+ years of ASIC experience is typical; degrees at all levels are considered.

Qualifications

• Bachelor’s degree with 4+ years ASIC experience.
• Master’s degree with 3+ years ASIC experience.
• PhD with 2+ years ASIC experience.
• Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.

Responsibilities

• Define, model, design (digital and/or analog) and verify IP for high‑performance, low‑power products.
• Create architectures, circuit specs, logic designs, and system simulations.
• Collaborate across software/hardware teams to meet system requirements and customer needs.
• Evaluate design flow from high‑level design to place-and-route, timing, and power use.

Skills

ASIC design & verification

System integration

Documentation

Education

Bachelor’s degree in Science, Engineering, or related field

Master’s degree in Science, Engineering, or related field

PhD in Science, Engineering, or related field

Tools

RTL to GDS Flow

Virtuoso

Scripting languages

Job description

Company

Qualcomm Technologies, Inc.

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

As a leading technology innovator, Qualcomm pushes the boundaries of what’s possible to enable next‑generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high‑performance, high‑quality, low‑power world‑class products. Qualcomm Engineers collaborate with cross‑functional groups to determine product execution path.

Minimum Qualifications

• Bachelor’s degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
• Master’s degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Preferred Qualifications

• Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
• 6+ years of ASIC design, verification, validation, integration, or related work experience.
• 2+ years of experience with architecture and design tools.
• 2+ years of experience with scripting tools and programming languages.
• 2+ years of experience with design verification methods.
• 1+ year of work experience in a role requiring interaction with senior leadership (e.g., Director level and above).

Principal Duties & Responsibilities

• Leverages advanced ASIC knowledge and experience to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high‐performance, high‑quality, low‑power products.
• Creates advanced architectures, circuit specifications, logic designs, and/or system simulations based on system‑level requirements.
• Collaborates across functional teams (e.g., software architecture, hardware architecture, product management, program management teams) to develop and execute an implementation strategy that meets system requirements and customer needs.
• Evaluates all aspects of complex process flow from high‑level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout flow.
• Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable advanced architecture and design of multiple complex blocks/SoC or IC Packages.
• Writes and reviews detailed technical documentation for complex EDA/IP/ASIC projects.

Level of Responsibility

• Works independently with minimal supervision.
• Provides supervision/guidance to other team members.
• Decision‑making is significant in nature and affects work beyond immediate work group.
• Requires verbal and written communication skills to convey complex information; may require negotiation, influence, tact, etc.
• Has a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to make key decisions).
• Tasks do not have defined steps; planning, problem‑solving, and prioritization must occur to complete the tasks effectively.

Pay range and Other Compensation & Benefits

$140,000.00 – $210,000.00. This pay scale reflects the broad, minimum to maximum, pay range for this job code. In addition, Qualcomm offers a competitive annual discretionary bonus program, opportunities for annual RSU grants, and a highly competitive benefits package designed to support your success at work, at home, and at play.

Equal Employment Opportunity

Qualcomm is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Disability Accommodations

Qualcomm is committed to providing an accessible hiring process for individuals with disabilities. Please contact disability‑[e-mail] or call Qualcomm's toll‑free number for assistance.