Memory Design Engineer

100 Intel Corporation; Austin (TX); Hybrid; USD 91,000 - 173,000; Full time

Benefits offered by this job

Stock bonuses

Health insurance

Retirement plan

Vacation

Job summary

Intel Corporation's Corporate Memory Organization seeks a Circuit Design Engineer to architect, design, and deliver SRAM compilers across high density and high performance profiles. You will collaborate with the DTCO team to co-define silicon process and layout rules while contributing to compiler design flows.

This entry-level role emphasizes industry-competitive SRAM solutions, design validation, and memory compiler workflows, with a hybrid work model and relocation flexibility within the US.

Qualifications

• MS degree in Electrical Engineering or Computer Engineering.
• 6+ months of experience in scripting (Perl, Tcl, Python, etc.).
• Experience with SRAM operations.
• Transistor-level operation and low-power circuit techniques.

Responsibilities

• Provide SRAM compiler design solutions to meet challenging memory specs.
• Design, validation, and characterization of Memory Compilers.
• Memory Compiler Design Flow and Methodology development.

Education

MS degree in Electrical Engineering or Computer Engineering

Tools

Perl

Tcl

Python

Job description

Intel's Corporate Memory Organization (CMO) within Design Technology Platform (DTP) drives development of Memory Compilers on Intel's leading edge process technologies.

The organization is responsible for architecting, designing and delivering high performance and energy efficient embedded memory IP that maximize silicon performance, optimize density, and maximize manufacturing yield across Intel Products and Intel Foundry platforms.

As a Circuit Design Engineer in CMO, you will be responsible for architecting, designing, and delivering SRAM compilers across high density (HD) and high performance (HP) profiles. You will also collaborate with Intel's Technology Development (TD) group on Design and Technology Co-Optimization (DTCO) to co-define the silicon process and physical layout rules.

Responsibilities

• Provide industry competitive SRAM design solutions to meet challenging memory design specs for various product segments.
• Design, validation, and characterization of Memory Compilers.
• Memory Compiler Design Flow and Methodology development.

Behavioral Skills/Traits

• Interfacing with customers.
• Logical thinking, analytical and problem-solving skills.
• Verbal/written communication skills.
• Interpersonal skills.
• Multitasking/prioritization skills.

This is an entry level position, and compensation will be given accordingly.

Qualifications

Minimum Qualifications: Candidate must have a MS degree with 6+ months of experience in Electrical Engineering or Computer Engineering or related field. 6+ months of experience in the following: Scripting (Perl or tcl or Python, etc.) Experience with SRAM operations Transistor level operation (VLSI course work), design challenges under process variations and low power circuit technique.

Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

This position is not eligible for Intel immigration sponsorship.

Job Details

Job Type: College Grad. Shift: Shift 1 (United States of America). Primary Location: US, Texas, Austin.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust: N/A

Benefits

• It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
• Find out more about the benefits of working at Intel.

Annual Salary Range

$91,150.00-172,860.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Additional Information

• Job posting details (such as work model, location or time type) are subject to change.
• Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices.
• We do not charge any fees during our hiring process.
• Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.