Low Power Design Methodology and Optimization Engineer

Socket.dev; Austin (TX); On-site; USD 192,000 - 278,000; Full time

Job summary

Google in Austin is seeking a Senior CPU low-power design engineer to develop advanced power-aware architectures. You will perform power analysis, optimize designs, and collaborate with RTL, verification, and physical teams to deliver efficient hardware solutions.

Ideal candidates have 10+ years in CPU low-power design, strong data analytics skills, and experience with Python/C/C++. The role offers competitive compensation, equity, and benefits.

Qualifications

• Bachelor's degree or equivalent practical experience.
• 10 years in CPU low-power design and optimization.
• Experience in low-power design, data analytics, and profiling.
• Flow automation experience with Python, C, C++.

Responsibilities

• Develop and implement advanced low power design methodologies for CPU architectures.
• Perform detailed power analysis, estimation, and optimization across various design stages.
• Collaborate with RTL design, verification, and physical design teams to integrate power-saving features.
• Drive the adoption of innovative power reduction techniques and tools.
• Contribute to the definition and validation of power management specifications.

Skills

Low-power CPU design

Data analytics

Profiling

Python

C

C++

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science

Tools

PTPX

Ansys Power Artist

Synopsys Prime Power RTL

Job description

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience in CPU low power design and optimization.
• Experience with low-power design (e.g., dynamic and leakage, power estimation, and optimization), data analytics, and profiling.
• Experience in flow automation (Python, C, C++).

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Experience in RTL design and low-power design techniques.
• Experience with power management and DVFS.
• Experience with CPU benchmarking, performance analysis, and industry study.
• Experience with vendor tools such as PTPX, Ansys Power Artist, and Synopsys Prime Power RTL.
• Knowledge of CPU microarchitecture.

About the job:

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $192000 - $278000 (USD) + 20% bonus target + equity + benefits

Learn more about benefits at Google.

Responsibilities:

• Develop and implement advanced low power design methodologies for CPU architectures.
• Perform detailed power analysis, estimation, and optimization across various design stages.
• Collaborate with RTL design, verification, and physical design teams to integrate power-saving features.
• Drive the adoption of innovative power reduction techniques and tools.
• Contribute to the definition and validation of power management specifications.