Low-Latency FPGA Engineer Intern (Trading Tech)

Optiver; Illinois; On-site; USD 72,000 - 88,000; Full time

Benefits offered by this job

Flight & housing stipends

Office perks and social events

Job summary

Optiver is seeking an FPGA Engineer Intern to work with mentors on real-world projects powering a global trading firm. You’ll contribute to nanosecond-scale, highly parallelized hardware and low-latency networking challenges.

The role offers hands-on experience with FPGA design, SystemVerilog, and collaboration across traders, software developers, and infrastructure engineers in a fast-paced environment in the US and Austin office.

Qualifications

• Pursuing a bachelor’s, master’s, or PhD in Computer or Electrical Engineering.
• On track to graduate between December 2027 and June 2028.
• Hands-on experience with digital design using FPGAs or ASICs.
• Proficient in hardware description languages (VHDL, Verilog, SystemVerilog).

Responsibilities

• Develop high-speed FPGA designs for trading systems.
• Research low-latency techniques and integration opportunities.
• Collaborate with traders, software developers, and infrastructure engineers.

Skills

FPGA design

HDL programming

Collaborative teamwork

Education

Bachelor's/Master's/PhD in Computer/Electrical Engineering

Tools

VHDL/Verilog/SystemVerilog

Job description

Optiver is seeking an FPGA Engineer Intern to work with mentors on real-world projects powering a global trading firm. You’ll contribute to nanosecond-scale, highly parallelized hardware and low-latency networking challenges.

The role offers hands-on experience with FPGA design, SystemVerilog, and collaboration across traders, software developers, and infrastructure engineers in a fast-paced environment in the US and Austin office.