Lead RTL Verification Methodology Engineer

Advanced Micro Devices; San Jose (CA); On-site; USD 120,000 - 150,000; Full time

Job summary

Advanced Micro Devices (AMD) is looking for a talented engineer to develop and maintain EDA tools focused on RTL static checks. In this role, you will lead tool development and collaborate with various teams to ensure comprehensive quality checks across complex designs. The ideal candidate has a degree in Electronics or Computer Engineering, strong expertise in SystemVerilog, and scripting knowledge. Responsibilities include regression design, tool qualification, and support of various design flows, all within an innovative and collaborative environment.

Qualifications

• Experience with RTL lint, CDC, and low-power static analysis.
• Strong working knowledge of SystemVerilog and UPF.
• Familiarity with Windows environments is a plus.

Responsibilities

• Lead development of a static RTL quality-checking tool.
• Collaborate with RTL, verification, and methodology teams.
• Design and execute tool-qualification regressions across complex AMD SoC designs.
• Build and maintain automation for regression efficiency.
• Support frontend and static design flows.

Skills

Digital design

SystemVerilog

Static RTL checking methodologies

Scripting languages (Python, Perl, Tcl, shell)

Education

Bachelor’s or master’s degree in Electronics Engineering or Computer Engineering

Tools

Static analysis tools (Lint, CDC, RDC, etc.)

Linux environments

Job description

Advanced Micro Devices (AMD) is looking for a talented engineer to develop and maintain EDA tools focused on RTL static checks. In this role, you will lead tool development and collaborate with various teams to ensure comprehensive quality checks across complex designs. The ideal candidate has a degree in Electronics or Computer Engineering, strong expertise in SystemVerilog, and scripting knowledge. Responsibilities include regression design, tool qualification, and support of various design flows, all within an innovative and collaborative environment.