Lead Analog Design Engineer, Power Management

Renesas Electronics Corp.; Chandler (AZ); On-site; USD 120,000 - 190,000; Full time

Job summary

Renesas Electronics Corp. in Chandler, AZ is seeking a technical lead or significant contributor in analog design for complex power management integrated circuits.

You will guide the analog team, implement improvements, and represent Renesas in front of external customers. Responsibilities include designing and validating CMOS PMIC blocks, leading blocks, coordinating with test, Applications Engineers, and customers, plus mentoring junior engineers.

Qualifications

• Education: B.S./M.S. in Electrical Engineering, Computer Engineering, or a related field.
• Experience: 5–10+ years in analog design.

Responsibilities

• Interpret requirement specifications to achieve system and design strategy for power management products.
• Technical leadership for major blocks, ensuring designs are guided into production.
• Design, simulation and layout supervision of CMOS power management circuits meeting performance, area, power and timescale constraints.
• Take ownership for complex block design, delegating tasks and reviewing design work.
• Feasibility study of new circuits and lead lab evaluation with Applications Engineers.
• Produce high quality documentation for IP blocks and lead innovation of design methodologies.
• Support DFT strategy and implementation; partner with test team for ramp to production.
• Top level simulation and verification planning and implementation.
• Coach and mentor less experienced team members.
• Customer-facing involvement and RFQ support.
• Ad hoc tasks as required by manager.

Skills

Communication

Teamwork

Education

B.S./M.S. in Electrical Engineering or Computer Engineering

Job description

Renesas Electronics Corp. in Chandler, AZ is seeking a technical lead or significant contributor in analog design for complex power management integrated circuits.

You will guide the analog team, implement improvements, and represent Renesas in front of external customers. Responsibilities include designing and validating CMOS PMIC blocks, leading blocks, coordinating with test, Applications Engineers, and customers, plus mentoring junior engineers.