Lead Analog Design Engineer - Embedded Flash & Validation

FHLB Des Moines; San Jose (CA); On-site; USD 91,000 - 232,000; Full time

Benefits offered by this job

Competitive base pay

Restricted stock units

Quarterly bonus payments

Health benefits from day one

Retirement savings plans

ESPP with 2 year look-back

Job summary

Microchip Technology Inc. seeks an experienced analog design engineer to simulate and validate analog blocks and Flash-IP macros, collaborating with design, technology, process, testing, and marketing teams to ensure performance and reliability.

The requirements include a BSEE with 10+ years in analog design, leadership across product development, experience with DAC/ADC, LVDS interfaces, LDOs, memory circuits, and CAD tools (HSPICE/FINESIM, Verilog, Cadence, LPE, EMIR); scripting in Python or

Qualifications

• BSEE with 10+ years in analog design
• Experience leading analog design in product development
• Experience in data conversion circuits (DAC/ADC) preferred
• Experience in communication circuits (PLL, DLL, LVDS, HS interfaces) preferred
• Experience in non-volatile memory design (HV circuits, charge pump generation) preferred
• Experience in silicon validation, debug, and testing
• Knowledge of scripting languages (Python, Tcl) and AI Tool adoption a plus
• Knowledge in Semiconductor device physics preferred
• Neural network knowledge (MLP/CNN/Transformer) with PTQ/HAT for HW preferred
• Creative thinker and team player in cross-functional teams

Responsibilities

• Simulate and validate analog circuit blocks and Flash-IP macros ensuring performance and reliability
• Coordinate with design, technology, process, and testing teams for effective collaboration
• Interface with marketing teams and customers to support development of embedded flash memory macros and address requirements

Skills

Creative thinker

Team player

Python scripting

Education

BSEE (Electrical Engineering)

Tools

HSPICE/FINESIM

Verilog

Cadence Design Entry

LPE

EMIR

Job description

Microchip Technology Inc. seeks an experienced analog design engineer to simulate and validate analog blocks and Flash-IP macros, collaborating with design, technology, process, testing, and marketing teams to ensure performance and reliability.

The requirements include a BSEE with 10+ years in analog design, leadership across product development, experience with DAC/ADC, LVDS interfaces, LDOs, memory circuits, and CAD tools (HSPICE/FINESIM, Verilog, Cadence, LPE, EMIR); scripting in Python or