Lead AMS Verification Engineer for Automotive PMICs

NXP Semiconductors; Chandler (AZ); Hybrid; USD 140,000 - 190,000; Full time

Job summary

NXP Semiconductors is seeking a Senior Analog Mixed-Signal Verification Engineer in Chandler, AZ to lead AMS verification for automotive and industrial PMIC products. You will define verification strategies, develop testbenches, and drive signoff across mixed-signal IPs and subsystems.

The role requires strong expertise in Verilog-AMS, SystemVerilog, UVM, RNM, and constrained-random techniques, with a track record of leadership and collaboration in fast-paced product development.

Qualifications

• M.S. in Electrical Engineering, Computer Engineering, or a related field.
• 10+ years of analog and mixed-signal IC verification with technical leadership.
• Strong understanding of PMICs, DC-DC converters, LDOs, ADCs, DACs, PLLs, references, and sensor interfaces.
• Expertise in AMS verification using Verilog-AMS, SystemVerilog, UVM, assertions, RNM.
• Experience developing behavioral models and reusable verification environments.
• Proficiency with Python, Perl, Tcl, or Shell for automation.

Responsibilities

• Review requirements, architecture specs, design docs, and interfaces for PMICs.
• Define AMS verification strategies aligned with system and safety requirements.
• Lead AMS verification activities, plans, environments, coverage, and signoff.
• Develop and validate mixed-signal simulation environments and scoreboards.
• Bridge digital and mixed-signal verification flows for robust verification.
• Mentor junior engineers and track milestones and regressions.

Skills

AMS verification

Verilog-AMS

SystemVerilog

UVM

RNM

Constrained-random verification

Python scripting

Behavioral models

Education

M.S. in Electrical Engineering or related field

Tools

Cadence tools

Synopsys tools

Siemens EDA tools

Job description

NXP Semiconductors is seeking a Senior Analog Mixed-Signal Verification Engineer in Chandler, AZ to lead AMS verification for automotive and industrial PMIC products. You will define verification strategies, develop testbenches, and drive signoff across mixed-signal IPs and subsystems.

The role requires strong expertise in Verilog-AMS, SystemVerilog, UVM, RNM, and constrained-random techniques, with a track record of leadership and collaboration in fast-paced product development.