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Amazon Leo seeks a Junior Design Verification Engineer to define and implement digital SOC verification for communications via LEO satellites. You will craft testbenches, run regressions, and validate ASICs using Verilog/SystemVerilog and UVM in a highly automated environment.
The role requires a Bachelor’s in EE/CS or related field with 2+ years in verification, plus experience in Matlab and SystemVerilog. On-site in Austin, TX, with a competitive package and benefits.
Amazon Leo seeks a Junior Design Verification Engineer to define and implement digital SOC verification for communications via LEO satellites. You will craft testbenches, run regressions, and validate ASICs using Verilog/SystemVerilog and UVM in a highly automated environment.
The role requires a Bachelor’s in EE/CS or related field with 2+ years in verification, plus experience in Matlab and SystemVerilog. On-site in Austin, TX, with a competitive package and benefits.