Intern Test Engineer: Hands-On IC Test & Hardware

Socket.dev; Leominster (MA); On-site; USD 34,000 - 43,000; Part time

Job summary

Infineon Technologies is offering a student/intern role focused on test development for wafer probe, test production, and product characterization within digital power management products. You will assist in defining test requirements, creating plans, and documenting methods under experienced engineers, with opportunities to learn DFT concepts and hands-on hardware design using Cadence Allegro.

The role emphasizes collaboration with design teams, practical learning of test hardware, and

Qualifications

• Pursuing a Bachelor's or Master's in Electrical/Electronics or Computer Engineering.
• Eager to learn test-development for mixed-signal ICs with ATE like Teradyne ETS-364.
• Basic knowledge of analog/digital circuits and high-speed signal integrity.
• Willingness to learn PCB design tools like Cadence Allegro.

Responsibilities

• Test development support for wafer probe, test production, and product characterization test solutions.
• Documentation: define test requirements, create test plans, document test methods.
• Collaborate with design and development engineers to implement design-for-test features.
• Gain hands-on exposure to designing and developing test hardware using PCB tools.
• Participate in creating, debugging, and verifying test programs on automated test equipment (ATE).
• Support optimization to improve quality and reduce test costs.

Skills

Test systems knowledge

Engineering principles

PCB tools

Programming (C/C++ or VB)

Soft skills

US citizen or greencard holder

Education

Bachelor's or Master's in Electrical/Electronics/Computer Engineering

Tools

Cadence Allegro

Teradyne ETS-364

Job description

Infineon Technologies is offering a student/intern role focused on test development for wafer probe, test production, and product characterization within digital power management products. You will assist in defining test requirements, creating plans, and documenting methods under experienced engineers, with opportunities to learn DFT concepts and hands-on hardware design using Cadence Allegro.

The role emphasizes collaboration with design teams, practical learning of test hardware, and