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Draper in Cambridge, MA seeks an ASIC Design Intern in the Silicon Architecture group to contribute from conceptual design through verification and delivery to customers. You will collaborate with Analog and Digital Designers to develop top-level and circuit-level specifications, run modeling and simulation, and assist with chip‑level planning for optimized SOCs.
Enrollment in an accredited full-time undergrad or grad program is required; hours are flexible.
Draper in Cambridge, MA seeks an ASIC Design Intern in the Silicon Architecture group to contribute from conceptual design through verification and delivery to customers. You will collaborate with Analog and Digital Designers to develop top-level and circuit-level specifications, run modeling and simulation, and assist with chip‑level planning for optimized SOCs.
Enrollment in an accredited full-time undergrad or grad program is required; hours are flexible.