IC Verification Engineer

Socket.dev; Wayne (CA); On-site; USD 144,000 - 230,000; Full time

Benefits offered by this job

Annual bonus

Equity grants

401(k) with match

Medical, dental and vision

Job summary

Socket.dev in the United States is seeking a senior verification engineer to architect and develop scalable and reusable Testbench environments using verification methodologies.

You will drive test plans for Block/Core/SOC features, write functional coverage, and build pseudo-random tests to reach full coverage and bring verification to closure. You will mentor junior team members, debug regression failures, and lead documentation of verification strategy and test environments.

Qualifications

• Bachelor's degree in Electrical/Electronics/Equivalent with 12+ years of experience; or Masters degree with 10+ years of experience.
• 10+ years of experience in developing complex Verification Environments, developing Test plans, Functional coverage and pseudo-random testing
• Must have gone through a full ASIC cycle from Architecture development to Tapeout with full focus on Verification
• Very proficient in System Verilog and Verification Methodologies like UVM/VMM
• Good debug skills in analyzing regression failures and understanding of complex designs
• A good understanding of a complex protocol like PCI Express or other multi-layered protocol
• Work with the team and mentor junior engineers

Responsibilities

• Architect and develop scalable and reusable Testbench environment using the framework of Verification Methodologies.
• Drive Test plans for all features for Block/Core/SOC and Write Functional coverage for these features.
• Build pseudo-random tests to verify and reach full Functional coverage and bring Verification to closure
• Debug Regression failures, analyze Functional Coverage gaps and improve tests to cover the gaps
• Work with other members of the team, guide/mentor junior team members
• Think differently and out-of-the-box to stress the DUT and verify it efficiently
• Lead the documentation of verification strategy including Test plans, Verification Environment, pseudo-random tests, etc.
• Lead reviews with design/architecture.

Skills

SystemVerilog

UVM/VMM

Debugging

PCIe protocol

Mentoring juniors

ASIC verification

Education

Bachelor's degree + 12+ years

Master's degree + 10+ years

Job description

Job Description

Job duties include

• Architect and develop scalable and reusable Testbench environment using the framework of Verification Methodologies.
• Drive Test plans for all features for Block/Core/SOC and Write Functional coverage for these features.
• Build pseudo-random tests to verify and get to full Functional coverage and bring the Verification to closure
• Debug Regression failures, analyze Functional Coverage gaps and improve tests to cover the gaps
• Work with other members of the team, guide/mentor junior team members
• Think differently and out-of-the-box to stress the DUT and verify it in an efficientway.
• Lead the documentation of verification strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture.
• Driver Verification quality and Efficiency improvements

Mandatory Requirements

• Bachelor's degree in Electrical/Electronics/Equivalent with 12+ years of experience; or Masters degree in Electrical/Electronics/Equivalent with 10+ years of experience
• 10+ years of experience in developing complex Verification Environments, developing Test plans, Functional coverage and pseudo-random testing
• Must have gone through a full ASIC cycle right from Architecture development to Tapeout with full focus on Verification
• Very proficient in System Verilog and Verification Methodologies like UVM/VMM
• Good debug skills in analyzing regression failures and understanding of complex designs
• A good understanding of a complex protocol like PCI Express or other multi-layered protocol
• Work with the team and mentor junior engineers

These requirements are a plus

• Experience in PCIe protocol
• Scripting knowledge of Python or Perl
• Comfort with Makefiles
• Experience with Verifying with other protocols like AXI

Compensation and Benefits

The annual base salary range for this position is USD 143,800.00 To USD 230,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.