IC Design Engineer

Broadcom; Irvine (CA); On-site; USD 120,000 - 192,000; Full time

Benefits offered by this job

Comprehensive benefits package

401(K) with company match

Employee Stock Purchase Program (ESPP)

Job summary

A leading semiconductor company in California is seeking a motivated engineer to join the Central Engineering Team, focusing on layout design and performance optimization for AI computing technologies. Candidates should have a Master's degree or PhD in Engineering and relevant experience with semiconductor technologies. The role offers a competitive salary, bonus, and comprehensive benefits including medical, dental, vision, and 401(K) options.

Qualifications

• Experience with advanced semiconductor technologies.
• Experience in implementing low power and high-performance cores.

Responsibilities

• Layout design of digital high-performance blocks.
• Timing closure of the blocks with optimal PPA.
• Debug LVS/DRC/ERC errors with verification tools.

Skills

Strong understanding of physical implementation

Excellent communication and cross-functional collaboration skills

Ability to analyze complex trade-offs and make data-driven decisions

Education

Master’s degree with 6+ years of experience or PhD with 3+ years

Tools

Place and Route tools

Job description

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Job Description:

The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking a motivated and technically strong engineer to join our team.

• Layout design of digital high-performance blocks
• Timing closure of the blocks with optimal PPA (power/performance/area)
• Debug LVS/DRC/ERC errors with verification tools
• Analyze trade-offs and performance implications of different cell architectures
• Collaborate with design and layout engineers to optimize layout for area and performance
• Work with CAD, packaging, and foundry teams to resolve layout and verification issues

Ideal Candidate Will Have:

• Strong understanding of physical implementation
• Experience with advanced semiconductor technologies
• Experience in implementing low power and high-performance cores
• Excellent communication and cross-functional collaboration skills
• Ability to analyze complex trade-offs and make data-driven decisions
• Master’s degree with 6+ years or PhD with 3+ years of hands-on experience with Place and Route tools; PhD in Engineering is a plus

Join us in shaping the next generation of high-performance compute technologies.

Additional Job Information:

Compensation and Benefits

The annual base salary range for this position is $120,000 - $192,000. This position is eligible for a discretionary annual bonus and equity in accordance with company plans and agreements.

Broadcom offers a comprehensive benefits package including medical, dental, vision, 401(K) with company match, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), paid holidays, sick leave, and vacation. The company complies with all applicable laws regarding leaves of absence.

Broadcom is an equal opportunity employer. We consider qualified applicants regardless of race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability, medical condition, pregnancy, veteran status, or any characteristic protected by law. We also consider qualified applicants with arrest and conviction records in accordance with local law.

If you are outside the USA, please provide a home address for future correspondence.

Thank you for your interest in Broadcom! We are a global leader in semiconductor and infrastructure software solutions.

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