Hybrid VLSI Design Engineer

Hewlett Packard Enterprise Development LP

Sunnyvale (CA)

Hybrid

USD 106,000 - 214,000

Full time

9 days ago
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Job summary

Hewlett Packard Enterprise in California is seeking a VLSI Engineer II Graduate to contribute to architecture, verification and implementation of VLSI components. The role is designed as hybrid with an average of 2 days per week in an HPE office.

The position offers opportunities to work on advanced hardware design, collaborate with a multidisciplinary team, and develop expertise in HDL, EDA tools, and FPGA methodologies within a supportive environment.

Qualifications

  • Bachelor's or Master's in Electrical Engineering, Computer Engineering or equivalent.
  • 0-4 years of experience in VLSI design, verification or implementation.
  • Strong understanding of EE fundamentals, VLSI principles, digital logic and computer architecture.
  • Experience with HDL/HDL-based design and EDA tools is a plus.

Responsibilities

  • Design portions of computer/server architecture and algorithms based on established VLSI engineering principles and in accordance with provided specifications and requirements.
  • Collaborates and communicates with management regarding design status, project progress, and issue resolution.
  • Designs, simulates, and tests VLSI circuits. Ensures the VLSI designs meet quality, schedule, and cost goals for prototype or production solutions.
  • Participates as a member of project team of other VLSI engineers and internal and outsourced development partners to develop reliable, cost effective and high quality solutions for VLSI prototypes and products.
  • Provides guidance and mentoring to less experienced staff members.

Skills

VLSI principles
Digital logic
Computer architecture
Analytical problem solving

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

HDL
EDA tools
FPGA tools

Job description

Hewlett Packard Enterprise in California is seeking a VLSI Engineer II Graduate to contribute to architecture, verification and implementation of VLSI components. The role is designed as hybrid with an average of 2 days per week in an HPE office.

The position offers opportunities to work on advanced hardware design, collaborate with a multidisciplinary team, and develop expertise in HDL, EDA tools, and FPGA methodologies within a supportive environment.

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