Hybrid Post-Silicon Validation & Lab Methodology Engineer

NVIDIA Corporation; Santa Clara (CA); Hybrid; USD 136,000 - 219,000; Full time

Benefits offered by this job

Equity

Benefits package

Hybrid work

Job summary

NVIDIA in Santa Clara is seeking a hardware engineer to own bring‑up, validation, and productization of next‑generation silicon from first power‑on through PVT sign‑off. You will partner with architecture, firmware, and software teams to define requirements for power management and clocking, and drive coverage from pre‑silicon through production.

You will build AI‑assisted lab workflows, automate telemetry, and lead root‑cause analysis on challenging HW/SW issues with robust measurement and

Qualifications

• BS or MS in Electrical or Computer Engineering, plus 5+ years in silicon bring-up, validation, debug, or productization.
• Strong fundamentals across digital development, microarchitecture, timing, clocking, power, noise, and HW/SW boundary.
• Hands-on lab proficiency: oscilloscopes, logic analyzers, power analyzers.
• Strong programming and scripting: Python, C/C++; experience building lab automation or test infrastructure.
• Experience using AI tools to accelerate silicon validation, anomaly detection, or LLm-assisted debug triage.

Responsibilities

• Own bring‑up, validation, qualification, tuning, and productization plans for next‑generation silicon — from first power‑on through PVT sign‑off.
• Partner across architecture, build, firmware, and software teams to define requirements for power management and clocking features, then drive coverage from pre‑silicon through production.
• Build and deploy AI assisted lab workflows; automate bring‑up telemetry and silicon data evaluation; provide anomaly detection on regression results and debug triage tooling.
• Build the test infrastructure, characterization methodologies, and bring‑up playbooks to raise velocity and shift coverage left.
• Lead root‑cause analysis on HW/SW interaction issues with measurement, instrumentation, and hypothesis rigor under schedule pressure.
• Identify where current processes break and redesign bring‑up sequencing, debug forums, regression frameworks, and lab metrics.

Skills

Python

C/C++

Lab Automation

Education

BS or MS in Electrical or Computer Engineering

Tools

Oscilloscopes

Logic Analyzers

Power Analyzers

Job description

NVIDIA in Santa Clara is seeking a hardware engineer to own bring‑up, validation, and productization of next‑generation silicon from first power‑on through PVT sign‑off. You will partner with architecture, firmware, and software teams to define requirements for power management and clocking, and drive coverage from pre‑silicon through production.

You will build AI‑assisted lab workflows, automate telemetry, and lead root‑cause analysis on challenging HW/SW issues with robust measurement and