Hybrid Mixed-Signal Verification Engineer

Intel; Hillsboro (OR); Hybrid; USD 141,910 - 200,340; Full time

Benefits offered by this job

Stock bonuses

Health & retirement benefits

Job summary

Intel in Oregon is seeking a dedicated verification engineer to perform functional verification of mixed-signal logic components, develop verification plans and test benches, and run system simulations to ensure designs meet specifications.

You will collaborate with digital/analog teams, debug issues in presilicon, document test plans, and help maintain verification infrastructure. The role offers a hybrid work model and a mature compensation package with stock bonuses and comprehensive benefits.

Qualifications

• Minimum Qualifications: Bachelor’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 3+ years of experience – or – Master’s Degree with 2+ years of experience.
• All years of experience must be directly applied in the following technical areas: Digital logic, VHDL/Verilog/SystemVerilog, Testbench component development (OVM/UVM), and design debugging skills.

Responsibilities

• Performs functional verification of mixed signal logic components, including analog behavioral modeling, to ensure design will meet specification requirements.
• Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to mixed signal microarchitecture specifications.
• Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
• Replicates, root causes, and debugs issues in the presilicon environment.
• Finds and implements corrective measures to resolve failing tests.
• Collaborates with digital and analog architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.
• Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
• Maintains and improves existing functional verification infrastructure and methodology.

Skills

Digital logic

VHDL/Verilog/SystemVerilog

Testbench development (OVM/UVM)

Debugging skills

Education

Bachelor's Degree in Electrical Engineering / Computer Engineering / Computer Science

Master's Degree in Electrical Engineering / Computer Engineering / Computer Science

Job description

Intel in Oregon is seeking a dedicated verification engineer to perform functional verification of mixed-signal logic components, develop verification plans and test benches, and run system simulations to ensure designs meet specifications.

You will collaborate with digital/analog teams, debug issues in presilicon, document test plans, and help maintain verification infrastructure. The role offers a hybrid work model and a mature compensation package with stock bonuses and comprehensive benefits.