High‑Speed Silicon Design & Validation Engineer

Broadcom; San Jose (CA); On-site; USD 120,000 - 192,000; Full time

Job summary

Broadcom is seeking a Silicon Design and Validation Engineer in San Jose, CA to design, verify and validate analog and mixed-signal high-speed building blocks and to collaborate with cross-functional teams to launch ASIC products for data center networking.

The role requires a MS/PhD in ECE and 6+ years of experience in analog/mixed-signal IP, front-end circuits, PLLs/VCOs, and high-speed I/O, along with MATLAB or Python proficiency and test bench experience.

Qualifications

• M.Sc. or PhD in Electrical Engineering or Computer Engineering with 6+ years of experience in analog and mixed signal IP design, verification and validation for high-speed data converters, SerDes and data center networking and optical I/O.
• Experience with design, validation and verification of analog front-end circuits, Trans-Impedance Amplifiers(TIA), PLLs, VCOs and clocking circuitry.
• Knowledge of development methodologies, design flows including EDA integration, foundry PDK and associated collaterals.
• Experience with bench test debug and validation of clock generation and timing IPs, data converters, TIAs, modulator drivers, clock and data recovery (CDR) and SerDes.
• Validation, verification and characterization of various control loops such as PLLs, LDOs.
• Deep understanding of signal integrity and power integrity for high-speed designs and experience with PI and SI measurements for correlation and debugging purposes.
• Experience in test development, debug, and reporting.
• Ability to work with Matlab or Python.
• Experience in assessing design bugs and recommending workarounds.
• Experience with measurement equipment such as DCO, oversampling/real time scopes, and network analyzers. Experience with RF and high speed probing is a plus.
• System level knowledge and deep understanding of current generation and next generation of optical and electrical high-speed I/Os
• Understanding of high-speed optical and electrical interconnect architectures and IEEE standards.
• Strong analytical thinking and problem-solving skills with excellent attention to details.
• It is a plus if the candidate has a good understanding of advanced packaging (2.5D / 3D) architectures.

Responsibilities

• Design, verify and validate analog and mixed-signal IP for high-speed data center networking.
• Collaborate with cross-functional teams to launch ASIC products.
• Develop and run test benches and perform measurements for SI/PI.
• Analyze and debug design issues and propose workarounds.
• Utilize MATLAB or Python for data analysis and scripting.

Skills

Analog/mixed-signal IP

Verification

Data center networking

Test bench debugging

MATLAB/Python

PI/SI analysis

Bug replication/rework

RF/high-speed probing

Education

M.Sc./PhD in Electrical/Computer Engineering

Tools

EDA toolchain

PDK/Foundry flows

Oscilloscopes

Network analyzers

Job description

Broadcom is seeking a Silicon Design and Validation Engineer in San Jose, CA to design, verify and validate analog and mixed-signal high-speed building blocks and to collaborate with cross-functional teams to launch ASIC products for data center networking.

The role requires a MS/PhD in ECE and 6+ years of experience in analog/mixed-signal IP, front-end circuits, PLLs/VCOs, and high-speed I/O, along with MATLAB or Python proficiency and test bench experience.