High-Speed PCB Layout Engineer — HDI, PCIe Gen6 (Onsite)

HCLTech; Fremont (CA); On-site; USD 78,000 - 148,000; Full time

Job summary

HCLTech is seeking a PCB Layout Engineer in Fremont, CA, onsite. You will own end-to-end PCB layout for complex data-center server boards, performing high-speed digital layout and collaborating with mechanical and electrical teams to optimize stack-up, routing, and manufacturability.

The role requires extensive CAD experience with Cadence Allegro and HDI via capability, plus strong communication skills to drive design reviews and documentation across multiple hardware programs.

Qualifications

• 10–14 years of CAD experience with Cadence Allegro.
• HDI micro via technology experience (Blind/Burried).
• Experience with DDR5/LPDDR5, PCIe Gen5/6 high-speed PCB design.
• Knowledge of layout rules for high-speed digital/analog/mixed-signal and power domains.
• Experience with CES and high-speed constraint-driven designs.
• Strong communication and presentation abilities.

Responsibilities

• Own end-to-end PCB layout for high-density designs.
• Perform high-speed layout for interfaces like DDR5/LPDDR5, PCIe Gen5/6, USB 3.2+.
• Develop and enforce layout rules across digital/analog/power domains.
• Collaborate with engineers to review schematics and provide layout feedback.
• Coordinate with mechanical for stack-up, thermal management and tolerances.
• Drive design-for-manufacturability reviews with vendors to ensure yield/reliability.
• Maintain and improve design standards, libraries and footprints.
• Provide layout documentation, net tracing, and revision analysis for boards.

Skills

Allegro PCB Layout

HDI via technology

High-speed PCB design

Signal routing

Constraint Editor (CES)

Power delivery design

Reviewing schematics

Presentation skills

Tools

Cadence Allegro

2D/3D CAD software

Job description

HCLTech is seeking a PCB Layout Engineer in Fremont, CA, onsite. You will own end-to-end PCB layout for complex data-center server boards, performing high-speed digital layout and collaborating with mechanical and electrical teams to optimize stack-up, routing, and manufacturability.

The role requires extensive CAD experience with Cadence Allegro and HDI via capability, plus strong communication skills to drive design reviews and documentation across multiple hardware programs.