HBM System Validation Lead for AI Accelerators

QUALCOMM, Inc.; San Diego (CA); On-site; USD 174,000 - 262,000; Full time

Job summary

Qualcomm Technologies, Inc. on the San Diego campus seeks a Memory System Validation lead to define and execute validation strategies for high‑bandwidth memory subsystems integrated with AI compute platforms.

You will lead pre‑silicon and post‑silicon validation of next‑generation stacked memory solutions, drive memory bring‑up, performance characterization, stress validation, reliability analysis, and production readiness across the product lifecycle.

Qualifications

• BS/MS/PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 8+ years of experience in memory validation, silicon validation, or platform bring-up.
• Knowledge of DDR4/DDR5/LPDDR5/LPDDR6 architectures, HBM technologies, memory controllers, PHY architectures, cache/coherency.
• Experience with pre-silicon validation, FPGA platforms, and post-silicon bring-up.
• Strong debugging using logic analyzers, protocol analyzers, performance counters, and firmware traces.

Responsibilities

• Lead end-to-end memory bring-up and validation strategy from emulation to production silicon.
• Develop validation plans for memory subsystems including initialization, training, power-state transitions, reliability, and diagnostics.
• Drive pre-silicon and first/second silicon bring-up and root-cause analysis of failures.
• Develop scalable automation frameworks for memory validation and telemetry tooling.
• Collaborate with memory architecture, PHY, firmware, and AI software teams to ensure validation coverage.

Skills

Memory validation

ASIC design

System debugging

Python

C/C++

Education

BS in Electrical/Computer Engineering or related

MS/PhD in Electrical/Computer Engineering or related

Tools

Logic analyzers

Protocol analyzers

Performance counters

Firmware traces

Job description

Qualcomm Technologies, Inc. on the San Diego campus seeks a Memory System Validation lead to define and execute validation strategies for high‑bandwidth memory subsystems integrated with AI compute platforms.

You will lead pre‑silicon and post‑silicon validation of next‑generation stacked memory solutions, drive memory bring‑up, performance characterization, stress validation, reliability analysis, and production readiness across the product lifecycle.