HBM SoC RTL Design Engineer

Micron Technology, Inc.; Richardson (TX); On-site; USD 181,000 - 323,000; Full time

Job summary

Micron Technology, Inc. in Richardson, TX, seeks a hands-on HBM SoC RTL Design Engineer to contribute to the development of next-generation memory solutions.

You will design and integrate RTL for high-performance SoC blocks and collaborate with architecture and verification teams. This role involves pre- and post-silicon support, debugging, and cross-functional collaboration with Product Engineering, Test, Process Integration, and Manufacturing to ensure robust, manufacturable designs.

Qualifications

• 10+ years of experience in SoC/RTL design and related areas.
• Strong proficiency in SystemVerilog/Verilog and RTL-to-GDS flows.
• Experience with EDA tools (Cadence, Synopsys, Siemens) and scripting (Python/TCL).

Responsibilities

• Design and implement RTL for SoC-level blocks and subsystems used in HBM logic die.
• Integrate internal and third-party IP (controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY-adjacent logic).
• Collaborate with SoC architects to translate architectural and micro-architectural specifications into high-quality RTL implementations.
• Participate in SoC-level integration activities, including clocking, reset, power intent, and configuration infrastructure.
• Assist with pre-silicon validation and post-silicon bring-up, including root-cause analysis of silicon issues.
• Contribute to design documentation, block specifications, and design reviews.
• Collaborate multi-functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds.

Skills

SystemVerilog/Verilog

Python scripting

Education

Bachelor’s or Master’s degree in Electrical/Computer Engineering

Tools

Cadence

Synopsys

Siemens

Job description

Req ID: JR115397 HBM SoC RTL Design Engineer

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets.

This is a hands‑on technical role passionate about RTL build, IP integration, debugging, and pre/post-silicon support. (LLM)

Key Responsibilities

• Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die.
• Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic).
• Collaborate with SoC architects to translate architectural and micro‑architectural specifications into high‑quality RTL implementations.
• Participate in SoC‑level integration activities, including clocking, reset, power intent, and configuration infrastructure.
• Assist with pre‑silicon validation and post‑silicon bring‑up, including root‑cause analysis of silicon issues.
• Contribute to design documentation, block specifications, and design reviews.
• Collaborate multi-functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds.

Minimum Qualifications

• Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field, with a minimum of 10 years of experience in a related field.
• Proficiency in SystemVerilog/Verilog and familiarity with SoC integration methodologies.
• Experience with the RTL‑to‑GDS flow, including synthesis, static timing analysis, and develop sign‑off considerations.
• Familiarity with EDA tools from Cadence, Synopsys, and/or Siemens.
• Programming or scripting experience (e.g., Python, TCL, Perl, or shell scripting).

Preferred Qualifications

• Experience with HBM, DRAM, or memory‑centric SoC designs.
• Familiarity with high‑speed interfaces, clocking strategies, reset architectures, and power management concepts.
• Exposure to DFT concepts (scan, MBIST, BIRA/BISR) and debug.
• Experience with hardware emulation or acceleration platforms. (e.g., Palladium, Veloce, Zebu)

Job Profile(s)

Systems Design Engineer 5 - Systems Design Engineering MTS

Relocation Level: TBD

The US base salary range that Micron Technology estimates it could pay for this full-time position is:

$181,000.00 - $323,000.00 a year

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.