Hardware Lab Engineer

Asteralabs; San Jose (CA); On-site; USD 160,000 - 200,000; Full time

Job summary

Asteralabs is seeking a Hardware Lab Engineer to develop connectivity products for AI infrastructure in San Jose, California. This position involves testing silicon devices and configuring hardware and software for optimal performance.

The ideal candidate will have at least 5 years of experience in lab environments and strong knowledge of high-speed test equipment. The base salary ranges from $160,000 to $200,000 and will depend on location and experience.

Qualifications

• 5-12+ years of hands-on experience in lab environments supporting silicon validation or hardware development.
• Strong programming skills in Python for test automation.
• Familiarity with Linux operating systems and command-line tools.

Responsibilities

• Setup and maintain test environments for silicon validation and characterization.
• Conduct hands-on testing of silicon devices including PCIe Gen5/6/7.
• Manage logistics and communications with external labs.

Skills

High-speed test equipment

Silicon testing

Test automation with Python

Firmware configuration

Education

Bachelor's degree in Electrical Engineering

Tools

Oscilloscopes

Protocol analyzers

Multimeters

Job description

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

Overview

Astera Labs Inc. is seeking an experienced and self-driven Hardware Lab Engineer to join our dynamic team in developing world‑class connectivity products for AI infrastructure.

Job Description

This role will work closely with firmware, system validation, quality, and product engineers to support silicon bring‑up, characterization, and debug activities through hands‑on lab execution. The ideal candidate will have a deep understanding of circuits, hands‑on experience with PCBAs and silicon test environments, and the ability to work on complex, open‑ended tasks with minimal oversight.

Key Responsibilities

• Setup and maintain test environments for silicon validation and characterization. Configure and update hardware, software, firmware, and applications. Replicate BKCs.
• Conduct hands‑on testing of silicon devices including PCIe Gen5/6/7, CXL, Ethernet, and other high‑speed interfaces
• Install and configure servers, including firmware, BIOS, OS, and network
• RMA intake/triage: inspection, electrical verification, screening (including CSAM inspection), and prioritization
• Manage logistics and communications with external labs
• Organize, track, and distribute lab equipment, hardware, and peripherals
• Ad hoc PCBA rework and soldering of fine‑pitch SMD components
• Develop, document, and maintain lab procedures

Required Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
• 5-12+ years of hands‑on experience in lab environments supporting silicon validation or hardware development
• Proficiency with high‑speed test equipment (oscilloscopes, protocol analyzers, BERTs, multimeters)
• Experience with high‑speed interface testing (PCIe, CXL, DDR, Ethernet, or SerDes)
• Strong programming skills in Python for test automation
• Familiarity with Linux operating systems and command‑line tools
• Demonstrated experience coordinating with third‑party testing laboratories and managing logistics, including sample shipping, chain of custody, and scheduling
• Strong organizational skills for managing multiple RMA cases simultaneously and prioritizing based on severity/impact

Preferred Qualifications

• Experience with post‑silicon validation of ASICs, SoCs, or Retimer/PHY products
• Knowledge of analog/mixed‑signal circuit testing and debugging techniques
• Experience with JTAG, I2C, SPI, and other embedded interfaces
• Familiarity with PCB design, schematic reading, and signal integrity concepts
• Knowledge of data center systems architecture (servers, AI platforms, networking equipment)
• Understanding of ATE (Automated Test Equipment) systems and production test methodologies
• Experience with defect screening methodologies including visual inspection, electrical testing, and acoustic imaging
• Experience with complete RMA lifecycle management from intake through root cause analysis and corrective action
• Knowledge of common semiconductor failure modes and failure analysis techniques including die attach inspection, delamination detection, void analysis, and crack identification
• Experience with formal compliance testing and industry standards

The base salary range is $160,000.00 USD – $200,000.00 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.