Hardware Engineer Internship - Summer 2027

Hudson River Trading; New York (NY); On-site; USD 235,000 - 293,000; Full time

Benefits offered by this job

Company-paid housing

Meals provided

Signing bonus

Job summary

Hudson River Trading (HRT) offers a Hardware Engineering Internship where you will design hardware in SystemVerilog and develop verification environments in Python. You’ll tackle projects in a fast-paced, real-time trading infrastructure while gaining insight into the financial markets and hardware development lifecycle.

You’ll start with training and then contribute to design and verification tasks, collaborating with teams across hardware and software interfaces to deliver impactful,

Qualifications

• You are a full-time student in a Computer Engineering, Electrical Engineering or related program
• You will be graduating and looking for full-time roles in 2028
• A thorough understanding of digital logic design and/or computer architecture
• Experience using a hardware design language such as SystemVerilog
• Familiarity with C++ and/or Python
• Knowledge of Linux and familiar with its command prompt
• A passion for technology and curiosity for how things work "under the hood"
• Exceptional problem solving skills
• Bonus: Familiarity with FPGAs or ASICs
• Bonus: Exposure to a hardware verification flow such as UVM, or open-source verification tools such as cocotb

Responsibilities

• Create hardware in SystemVerilog (design) and build complex modeling and testing environments in Python (verification)
• Work on independent projects within the internship program
• Learn about cutting edge FPGA/ASIC technology and hardware verification flows
• Jump into projects within the first two weeks of the program

Skills

Familiarity with C++/Python

Digital logic design/architecture

Problem solving

Curiosity about how things work

Linux command line

Tools

SystemVerilog

Python

C++

Job description

The Hardware team at Hudson River Trading (HRT) creates high performance compute engines using FPGA and ASIC technologies to drive low latency trading decisions on global markets. We build custom solutions across the spectrum of speed and smarts: from bespoke circuits to world-class machine learning accelerators.

The FPGA/ASIC Design team and Verification team work in close collaboration, pushing boundaries in low-level computer architecture, logic design, tool writing, and the interface between hardware and software. There is often overlap in skills, and both teams work together very closely. The Hardware Engineering Summer 2027 Internship offers candidates the opportunity to explore both Design and Verification roles.

During HRT’s Hardware Engineering Internship, you will have the opportunity to create hardware in SystemVerilog (design) and build complex modeling and testing environments in Python (verification). You can always expect to be challenged by the ever-changing financial markets, and find yourself working on critical infrastructure in an extremely fast-paced, real-time environment.

What to Expect

• A challenging and meaningful summer internship program that will give you an introduction to all technical facets of hardware engineering in the algorithmic trading industry
• Independent projects that will have you deep dive into our hardware design and verification environments
• An opportunity to work with and learn more about cutting edge FPGA/ASIC technology
• After some intense but brief training, you’ll jump right into projects within your first two weeks of the program
• You’ll learn all about HRT's research and trading infrastructure, even in areas you won’t be working in
• You’ll have the opportunity to learn about and gain a deeper understanding of the financial markets

Requirements

• You are a full-time student in a Computer Engineering, Electrical Engineering or related program
• You will be graduating and looking for full-time roles in 2028
• A thorough understanding of digital logic design and/or computer architecture
• Experience using a hardware design language such as SystemVerilog
• Familiarity with C++ and/or Python
• Knowledge of Linux and familiar with its command prompt
• A passion for technology and curiosity for how things work "under the hood"
• Exceptional problem solving skills
• Bonus: Familiarity with FPGAs or ASICs
• Bonus: Exposure to a hardware verification flow such as UVM, or open-source verification tools such as cocotb

Weekly base salary of 5,800 USD and a competitive signing bonus in addition to company-paid housing, meals, and other perks.

Culture

Hudson River Trading (HRT) brings a scientific approach to trading financial products. We have built one of the world's most sophisticated computing environments for research and development. Our researchers are at the forefront of innovation in the world of algorithmic trading.
At HRT we welcome a variety of expertise: mathematics and computer science, physics and engineering, media and tech. We’re a community of self-starters who are motivated by the excitement of being at the cutting edge of automation in every part of our organization—from trading, to business operations, to recruiting and beyond. We value openness and transparency, and celebrate great ideas from HRT veterans and new hires alike. At HRT we’re friends and colleagues – whether we are sharing a meal, playing the latest board game, or writing elegant code. We embrace a culture of togetherness that extends far beyond the walls of our office.
Feel like you belong at HRT? Our goal is to find the best people and bring them together to do great work in a place where everyone is valued. HRT is proud of our diverse staff; we have offices all over the globe and benefit from our varied and unique perspectives. HRT is an equal opportunity employer; so whoever you are we’d love to get to know you.

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