Hardware Design Engineer - 2027 Grads

Hudson River Trading; New York (NY); On-site; USD 270,000 - 330,000; Full time

Job summary

Hudson River Trading (HRT) is hiring for a hardware-focused role in New York. You will design and verify high-performance compute engines using FPGA/ASIC, implementing on-the-fly market data transformations and RTL models on a collaborative global team.

Prior internship in digital logic design is a plus. The team emphasizes rigorous design, verification, and learning, with a base salary around the stated figure and performance bonuses.

Qualifications

• Pursuing BS/MS/PhD in CS/CE/EE with eligibility for full-time in 2027.
• Proficiency in SystemVerilog.
• Deep knowledge of FPGA internals and/or ASIC.
• Excellent digital logic design, optimization, debugging and problem solving.
• Thorough understanding of computer architecture and vendor tool suites.
• Familiarity with C++ and/or Python.
• Comfortable working in a Linux environment.
• Previous internship experience in digital logic design.
• Expertise in networking protocols, CPU design, physical design, or ML accelerators is a big plus.

Responsibilities

• Contribute to a highly collaborative team, delivering hardware solutions.
• Describe and communicate hardware designs at various abstraction levels.
• Analyze and fix problems quickly.
• Continuously learn, tinker, and explore new technologies to deepen hardware expertise.
• Challenge teammates and raise the bar for the team's output.

Skills

SystemVerilog

FPGA internals

C++

Python

Linux

Digital logic design

Problem solving

Education

Bachelor's/Master's/PhD in CS/CE/EE

Tools

Linux

Job description

The Hardware team at Hudson River Trading (HRT) creates high performance compute engines using FPGA and ASIC technologies to drive low latency trading decisions on global markets. We build custom solutions across the spectrum of speed and smarts: from bespoke circuits to world-class machine learning accelerators.

FPGAs and ASICs are critical pieces of our technology stack. We are looking for talented hardware developers to architect and design complex systems on a highly collaborative global team. In this role, you'll identify efficient ways to perform on-the-fly transformations of market data and implement models with complex data structures in RTL. You’ll work with FPGA, ASIC, or both technologies as a member of our integrated team. No previous financial experience is necessary!

Responsibilities

• Contribute to a highly collaborative team, working closely with others to deliver hardware solutions
• Describe and communicate hardware designs at a high level (the interface), low level (step-by-step algorithm/circuit), or anywhere in between
• Analyze and fix problems quickly
• Continuously learn, tinker, and explore new technologies to deepen your hardware expertise
• Challenge your teammates and raise the bar for the work the team produces

Qualifications

• Currently pursuing a Bachelor's, Masters, or PhD in Computer Science, Computer Engineering, Electrical Engineering, or a related discipline, with eligibility for full-time employment in 2027
• Proficiency in SystemVerilog
• Deep knowledge of FPGA internals and/or ASIC
• Excellent digital logic design, optimization, debugging and problem solving skills
• Thorough understanding of computer architecture and vendor tool suites
• Familiarity with C++ and/or Python
• Comfortable working in a Linux environment
• Expertise in networking protocols, CPU design, physical design, or machine learning accelerators is a big plus

Hardware Design and Verification at HRT

HRT hires for both design and verification roles. There is often overlap in skills, and both teams work together very closely. Design engineers typically have training in computer architecture and digital logic design, and they are primarily focused on creating hardware in SystemVerilog. Verification engineers typically have training in both digital logic and software engineering, and are primarily focused on building complex modeling and testing environments in Python and C++.

The estimated base salary range for this position is 300,000 USD per year (or local equivalent). The base pay offered may vary depending on multiple individualized factors, including location, job-related knowledge, skills, and experience. This role will also be eligible for discretionary performance-based bonuses and a competitive benefits package.

Culture

Hudson River Trading (HRT) brings a scientific approach to trading financial products. We have built one of the world's most sophisticated computing environments for research and development. Our researchers are at the forefront of innovation in the world of algorithmic trading.
At HRT we welcome a variety of expertise: mathematics and computer science, physics and engineering, media and tech. We’re a community of self-starters who are motivated by the excitement of being at the cutting edge of automation in every part of our organization—from trading, to business operations, to recruiting and beyond. We value openness and transparency, and celebrate great ideas from HRT veterans and new hires alike. At HRT we’re friends and colleagues – whether we are sharing a meal, playing the latest board game, or writing elegant code. We embrace a culture of togetherness that extends far beyond the walls of our office.
Feel like you belong at HRT? Our goal is to find the best people and bring them together to do great work in a place where everyone is valued. HRT is proud of our diverse staff; we have offices all over the globe and benefit from our varied and unique perspectives. HRT is an equal opportunity employer; so whoever you are we’d love to get to know you.

Please be advised: Use of AI tools by an applicant during interviews or assessments is strictly prohibited, unless otherwise instructed or agreed upon. We employ various methods to evaluate the authenticity of candidate responses. If we determine that AI assistance was used by an applicant during an interview or an assessment, we reserve the right to immediately end the interview or assessment, disqualify the applicant’s candidacy and/or rescind any job offers extended.

The Hardware team at Hudson River Trading (HRT) creates high performance compute engines using FPGA and ASIC technologies to drive low latency trading decisions on global markets. We build custom solutions across the spectrum of speed and smarts: from bespoke circuits to world-class machine learning accelerators.

FPGAs and ASICs are critical pieces of our technology stack. We are looking for talented hardware developers to architect and design complex systems on a highly collaborative global team. In this role, you'll identify efficient ways to perform on-the-fly transformations of market data and implement models with complex data structures in RTL. You’ll work with FPGA, ASIC, or both technologies as a member of our integrated team. No previous financial experience is necessary!

Responsibilities

• Contribute to a highly collaborative team, working closely with others to deliver hardware solutions
• Describe and communicate hardware designs at a high level (the interface), low level (step-by-step algorithm/circuit), or anywhere in between
• Analyze and fix problems quickly
• Continuously learn, tinker, and explore new technologies to deepen your hardware expertise
• Challenge your teammates and raise the bar for the work the team produces

Qualifications

• Currently pursuing a Bachelor's, Masters, or PhD in Computer Science, Computer Engineering, Electrical Engineering, or a related discipline, with eligibility for full-time employment in 2027
• Proficiency in SystemVerilog
• Deep knowledge of FPGA internals and/or ASIC
• Excellent digital logic design, optimization, debugging and problem solving skills
• Thorough understanding of computer architecture and vendor tool suites
• Familiarity with C++ and/or Python
• Comfortable working in a Linux environment
• Previous internship experience in digital logic design
• Expertise in networking protocols, CPU design, physical design, or machine learning accelerators is a big plus

Hardware Design and Verification at HRT

HRT hires for both design and verification roles. There is often overlap in skills, and both teams work together very closely. Design engineers typically have training in computer architecture and digital logic design, and they are primarily focused on creating hardware in SystemVerilog. Verification engineers typically have training in both digital logic and software engineering, and are primarily focused on building complex modeling and testing environments in Python and C++.

The estimated base salary range for this position is 300,000 USD per year (or local equivalent). The base pay offered may vary depending on multiple individualized factors, including location, job-related knowledge, skills, and experience. This role will also be eligible for discretionary performance-based bonuses and a competitive benefits package.

Culture

Hudson River Trading (HRT) brings a scientific approach to trading financial products. We have built one of the world's most sophisticated computing environments for research and development. Our researchers are at the forefront of innovation in the world of algorithmic trading.
At HRT we welcome a variety of expertise: mathematics and computer science, physics and engineering, media and tech. We’re a community of self-starters who are motivated by the excitement of being at the cutting edge of automation in every part of our organization—from trading, to business operations, to recruiting and beyond. We value openness and transparency, and celebrate great ideas from HRT veterans and new hires alike. At HRT we’re friends and colleagues – whether we are sharing a meal, playing the latest board game, or writing elegant code. We embrace a culture of togetherness that extends far beyond the walls of our office.
Feel like you belong at HRT? Our goal is to find the best people and bring them together to do great work in a place where everyone is valued. HRT is proud of our diverse staff; we have offices all over the globe and benefit from our varied and unique perspectives. HRT is an equal opportunity employer; so whoever you are we’d love to get to know you.

Please be advised: Use of AI tools by an applicant during interviews or assessments is strictly prohibited, unless otherwise instructed or agreed upon. We employ various methods to evaluate the authenticity of candidate responses. If we determine that AI assistance was used by an applicant during an interview or an assessment, we reserve the right to immediately end the interview or assessment, disqualify the applicant’s candidacy and/or rescind any job offers extended.

You can review our Global Applicant Privacy Notice, which explains how we process applicant information.