Hardware Engineer (FPGA/ASIC)

Jane Street; New York (NY); On-site; USD 45,000 - 65,000; Full time

Job summary

Jane Street in New York is offering a hardware internship where you work closely with full-time engineers on real projects using OCaml & Hardcaml to design and test hardware.

You will gain exposure to FPGA and ASIC workflows, learn HDL languages, and contribute to design validation while being mentored by experienced engineers. No prior Hardcaml knowledge is required.

Qualifications

• Comfortable with a software programming language.
• Experienced with a Hardware Description language (HDL) for hardware designs.
• Experienced with FPGA/ASIC vendor tools: Vivado, Quartus, Genus, Innovus.
• Experience building a hardware project (FPGA/ASIC) in academic, professional, or personal work.
• Interest in learning how to use FPGAs/ASICs in networking contexts.

Skills

Programming language

HDL language

FPGA tools

ASIC tools

Hardware project experience

Networking interest

Tools

Vivado

Quartus

Genus

Innovus

Job description

About the Position

Our goal is to give you a real sense of what it’s like to work at Jane Street full time while also providing a truly unparalleled educational experience. As an intern, you are paired with full-time employees who act as mentors, collaborating with you on real-world projects we actually need done.

In this internship, you’ll learn how we use tools to make programming faster, more pleasant, and more reliable. We apply these same principles to our hardware engineering work, and we’re looking for people who are interested in using programming language technology to improve the process of designing, testing, and validating hardware designs. We use Hardcaml, an OCaml library for succinctly describing hardware in RTL. Hardcaml is tightly integrated into our development environment, so you’ll also gain lots of exposure to the libraries and tools that are foundational to our internal systems. No previous knowledge of Hardcaml is required.

The hardware team at Jane Street works on both FPGA and ASIC designs. Depending on your background and experience, we’ll craft a project that gives you exposure to our shared Hardcaml tech stack, as well as targeting an FPGA or ASIC platform.

During the program, you’ll dive deep on one project, mentored closely by the full-time employees who helped design it. Some intern projects consider big-picture questions that we’re still trying to figure out, while others involve building something new. Your mentors will help you gain a better understanding of the wide range of problems we solve every day. We expect interns to build hardware applications from concept to a working design; your projects will predominantly involve OCaml & Hardcaml, for both RTL design and testing/integration.

If you’d like to learn more, you can read about our interview process, meet some of our newest hires, or check out our OCaml All The Way Down talk and Programmable Hardware podcast episode. You can also learn more about Jane Street’s internship program here.

About You

We don’t expect you to have a background in finance, OCaml, functional programming, or any other specific field— we’re looking for smart people who enjoy solving interesting problems. We’re more interested in how you think and learn than what you currently know. You should be:

• Comfortable with a software programming language
• Experienced with a Hardware Description (or Construction) language (VHDL, Verilog, Chisel, Pymtl, or other), for both writing and testing hardware designs
• Experienced working with FPGA or ASIC vendor tools - Vivado or Quartus for FPGAs, Genus or Innovus for ASICs
• Experienced with building a working hardware project (either FPGA or ASIC) through an academic, professional, or personal project
• Interested in learning how to use FPGAs or ASICs in the context of networking