GPU Verification Engineer Hybrid Role with Stock

Intel Corporation; Santa Clara (CA); Hybrid; USD 164,000 - 232,000; Full time

Benefits offered by this job

Health benefits

Stock bonuses

Retirement plan

Paid vacation

Job summary

Intel Corporation in Santa Clara is seeking a GPU Design Verification Engineer to verify graphics logic components and develop scalable IP verification environments. You will run system simulations, analyze power/timing, and debug issues pre-silicon, collaborating with GPU architects and RTL teams to meet functional and performance goals.

Applicants should have SystemVerilog/UVM expertise, strong test bench experience, and scripting skills (Python, PERL, Shell).

Qualifications

• Bachelor’s degree with 5+ years of experience or Master’s with 4+ years in electronics/computer engineering.
• Test bench bring-up at IP level and strong SystemVerilog/UVM programming.
• Hands-on verification on ASIC/CPU/GPU and IP-level test plan development with coverage closures.
• Experience with frontend design/verification flows; scripting in Python, PERL, and Shell.

Responsibilities

• Perform functional verification of graphics logic components (3D graphics, media, display).
• Develop scalable IP verification plans, test benches, and verification environments.
• Execute plans with system simulations, analyze power and timing, and debug issues.
• Collaborate with GPU architects, RTL designers, and physical design teams.
• Document test plans and drive technical reviews; maintain verification infrastructure.

Skills

SystemVerilog

UVM

Test bench bring-up

Coverage driven verification

ASIC/CPU/GPU verification

Education

Bachelor's degree in electronics, computer engineering, or related engineering

Master's degree in electronics, computer engineering, or related engineering

Tools

Python

PERL

Shell scripting

Job description

Intel Corporation in Santa Clara is seeking a GPU Design Verification Engineer to verify graphics logic components and develop scalable IP verification environments. You will run system simulations, analyze power/timing, and debug issues pre-silicon, collaborating with GPU architects and RTL teams to meet functional and performance goals.

Applicants should have SystemVerilog/UVM expertise, strong test bench experience, and scripting skills (Python, PERL, Shell).