GPU Implementation Engineer(Austin & San Diego)

Qualcomm; Austin (TX); On-site; USD 161,800 - 242,600; Full time

Benefits offered by this job

Competitive annual discretionary bonus program

RSU grants

Comprehensive benefits package

Job summary

A leading technology company in Austin, Texas seeks a Design Implementation Engineer to join its Adreno GPU team. The role involves managing frontend design challenges, delivering advanced GPU cores, and closely collaborating with microarchitecture and physical design teams. Candidates should possess a strong background in ASIC design flow and have experience with EDA tools. A Bachelor's degree in Electrical/Computer Engineering or a related field is required, along with a significant relevant work experience.

Qualifications

• Experience in frontend implementation with 4+ years in Computer Engineering or a related field.
• Strong knowledge of ASIC design flow and advanced nanometer technologies.
• Experience in leading high-performance teams to achieve aggressive PPA targets.

Responsibilities

• Manage aspects of frontend implementation design challenges.
• Integrate and deliver GPU cores.
• Collaborate closely with microarchitecture and physical design teams.

Skills

Digital design and RTL synthesis

Experience with EDA tools

Power vector generation and analysis

Collaboration with RTL designers

Scripting skills using Tcl or Python

Analytical and communication skills

Education

Bachelor's degree in Electrical/Computer Engineering or related field

Tools

Design Compiler

Fusion Compiler

Genus

Innovus

Conformal LEC

Formality

PrimeTime

Job description

Company

Qualcomm Technologies, Inc.

Job Area

Engineering Group, Engineering Group > GPU ASICS Engineering

General Summary

The Design Implementation Engineer will work in Qualcomm's Adreno GPU team and will be responsible for managing all aspects of frontend implementation design challenges and methodology. The successful applicant will integrate, implement, and deliver state-of-the-art GPU cores and will be working closely with the microarchitecture and physical design teams to meet very aggressive Power, Performance, and Area (PPA) targets. The successful candidate will possess an in-depth understanding of ASIC design flow and the challenges posed by advanced nanometer technologies.

Candidate is expected to be able to demonstrate

• Experience with digital design and RTL synthesis
• Experience with EDA tools such as: Design Compiler, Fusion Compiler, Genus, Innovus, Conformal LEC, Formality, and PrimeTime
• Experience with power vector generation and power analysis
• Ability to collaborate with RTL designers to improve power and performance
• Solid scripting skills using Tcl or Python
• Excellent analytical and communication skills, self‑motivated

Preferred Skills

• Knowledge of UPF
• Knowledge of advanced process nodes, e.g. 3 nm and below
• Understanding of GPU microarchitecture
• Experience with leading a high‑performance team to push aggressive PPA targets is advantageous

Minimum Skills

• Bachelor’s degree in Electrical/Computer Engineering or related field with 7+ years of direct frontend implementation and physical design work experience
• Master’s degree in Electrical/Computer Engineering or related field with 6+ years of direct frontend implementation and physical design work experience
• PhD in Electrical/Computer Engineering or related field with 5+ years of direct frontend implementation and physical design work experience
• Strong background and experience working with industry standard synthesis and place‑and‑route tools
• Experience with process technology nodes below 10 nm

Minimum Qualifications

• Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
• Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 3+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
• PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field and 2+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.

Pay Range And Other Compensation & Benefits

$161,800.00 - $242,600.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Salary is only one component of total compensation. Qualcomm also offers a competitive annual discretionary bonus program, RSU grants, and a comprehensive benefits package.

EEO Statement

Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Contact

If you would like more information about this role, please contact Qualcomm Careers.